Unformatted text preview: EE543 Introduction to Digital Systems LABORATORY #7 Data Storage Registers OBJECTIVE: The objective of this laboratory is to data storage and manipulation in storage registers. EQUIPMENT REQUIRED: IDL-800 Digital Lab Wire Leads 1 Logic Probe 1 74175 TTL quad D positive edge-triggered Flip/Flop Register PRELAB: 1. The 74175 is a quad D-Flip Flop IC with a clear input. Attached to this lab handout is the data sheet for a 74175. You should review it carefully before attempting this laboratory. Connect the 74175 so that it captures the state of the logic levels on the four switches SW3-SW0 on the IDL-800 Digital Lab when you initiate a clock pulse from Pulse Switch labeled A. Pulse Switch labeled B should be used as the CLEAR signal to the 74175. Note that the CLEAR input to the 74175 is a low active signal and that the 74175 contains positive edge-triggered flip flops. The output of the register should be tied to the 8-Bit Display labeled 3-0 to indicate the state of the register’s output. For example, when the should be tied to the 8-Bit Display labeled 3-0 to indicate the state of the register’s output....
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- Spring '07
- Clock signal, Logic gate, Flip-flop, Clock Pulse, IDL-800 Digital Lab