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MOS Field-Effect Transistors (MOSFETs)
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DEVICE STRUCTURE AND PHYSICAL OPERATION The enhancement-type MOSFET is the most widely used field-effect transistor. Figure 1.1 shows the physical structure of the n-channel enhancement MOSFET. The n-channel enhancement MOSFET is fabricated on a p-type substrate. Two heavily doped n-type regions, indicated in the figure as the n+ source and the n+ drain regions are created in the substrate. A thin layer of silicon dioxide (Si02) of thickness t ox (typically 2 - 50nm), which is an excellent electrical insulator, is grown on the surface of the substrate, covering the area between the source and drain regions. Metal is deposited on top of the oxide layer to form the gate electrode of the device. Metal contacts are also made to the source region, the drain region, and the substrate, also known as the body. Figure 1.1 Physical structure of the enhancement-type NMOS transistor: (a) perspective view; (b) Cross- section. Thus four terminals are brought out: the gate terminal (G), the source terminal (S), the drain terminal (D), and the substrate or body terminal (B). At this point it should be clear that the name of the device (metal-oxide-semiconductor FET) is derived from its physical structure. In fact, most modern MOSFETs are fabricated using a process known as silicon-gate technology, in which a certain type of silicon, called polysilicon, is used to form the gate electrode. Another name for the MOSFET is the insulated- gate FET or IGFET. This name also arises from the physical structure of the device, emphasizing the fact that the gate electrode is electrically insulated from the device body. Observe that the substrate forms pn junctions with the source and drain regions. Since the drain will be at a positive voltage relative to the source, the two pn junctions can be effectively cut off by simply connecting the substrate terminal to the source terminal. Thus, here, the substrate will be considered as having no effect on device operation, and the MOSFET will be treated as a three-terminal device, with the terminals being the gate (G), the source (S), and the drain (D). It will be shown that a voltage applied to the gate controls current flow between
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source and drain. This current will flow in the longitudinal direction from drain to source in the region labeled "channel region." Note that this region has a length L and a width W, two important parameters of the MOSFET. Operation with No Gate Voltage With no bias voltage applied to the gate, two back-to-back diodes exist in series between drain and source. One diode is formed by the pn junction between the n + drain region and the p-type substrate, and the other diode is formed by the pn junction between the p-type substrate and the n+ source region. These back-to-
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