hwk1 - type Frequency Clock cycle count ALU 48 1 Loads 24 2...

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University of Southern California Department of Electrical Engineering EE557 Fall 2001 Instructor: Michel Dubois Homework #1. Due: Tuseday September 18 Please fill out Name and S# and attach to the first page of your homework. NAME: First:__________________Last:_____________________ S#:______________________ TOTAL SCORE: /150 Problem 1 (20pts). Problem 1.1 in PH, with the following modification: a computation run in vector mode is 12.5 times faster (instead of 20 times faster). Problem 2 (20pts). Problem 1.4 in PH, using the following instruction mix and cycle counts for the original machine (instead of the table on page 45): In this problem, you should neglect the effect of the new instruction on register allocation. Problem 3 (10pts) Problem 1.6 in PH. Problem 4 (10pts). Problem 1.8 in PH a, b, c, d for the SuperSPARC chip s only.. Problem 5 (10pts). Problem 1.15 in PH. Table 1: Instruction
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Unformatted text preview: type Frequency Clock cycle count ALU 48% 1 Loads 24% 2 Stores 12% 2 Branch 16% 1 Problem 6 (20pts) Problem 2.1. in PH, with the following modification: Use the dynamic instructin mix of problem 2 above. Problem 7 (10pts). Problem 2.2 in PH, with the following modification: Use the dynamic instructin mix of problem 2 above. Problem 8 (30pts) Problem 2.3 in PH, with the following modification. Answer the problem for the following code sequence (instead of the one given in the book): B=A+B C=B-C D=C+B For the accumulator machine, use instructions such as loada X, storea X, Adda X, Suba X. For the stack machine, use POP X, PUSH X, ADD, and SUB. Note that when the stack contains an input operand for any of these instructions, the operands are removed from the stack. For the load/store machine, use DLX or MIPS. Problem 9 (20pts). Problem 2.8 in PH....
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