ECE 445 - Spring 2016- HW5

ECE 445 - Spring 2016- HW5 - Homework Assignment#5 Spring...

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Homework Assignment #5 Spring 2016 Homework #5 R EADING : 1. Hennessey & Patterson: 4.1 – 4.4 2. MIPS Multi-cycle Implementation (supplemental reading found on Blackboard) 3. El-Rewini: 5.1 – 5.5 P ROBLEM S ET : Multiple-choice Problems. Choose the correct answer for each problem. 1. The clock period for the One-bus implementation of the MIPS processor is determined by (a) the amount of time the ALU needs to complete an ADD operation. (b) the instruction that requires the most amount of time. (c) the amount of time needed to complete the longest step for fetch or execute . (d) the amount of time needed to complete the shortest step for fetch or execute . (e) None of the above. 2. Which actions can be carried out in parallel in the MIPS One-bus implementation? (a) R[MAR] ← R[PC] and R[IR] ← R[MDR] (b) R[PC] ← R[A] + 4 and R[MDR] ← M[ R[MAR] ] (c) R[A] ← R[Rs] and R[B] ← R[Rt] (d) R[B] ← SignExtImmediate and R[Rd] ← R[A] + R[B] (e) All of the above.
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  • Fall '08
  • Tabak,D
  • Clock signal, Central processing unit, Dr. Craig Lorie, MIPS One-bus implementation

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