16_EEL4742-Notes#16 - EEL4742 Notes 16 Full versus Partial...

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EEL4742 Notes # 16 Full versus Partial Address Decoding Full address decoding uses all address lines to completely decode an address. To decode a single word of memory all address lines are used. Consider address decoding (Fully) the memory location 0001 hex : Partial address decoding uses a subset of all of the address lines to decode. Advantage saves hardware Disadvantage: the decoder will go low for more than one location Consider using only address lines A 15 , A 14 , A 13 , A 12 Separate I/O space versus memory-mapped I/O Since processors use the same memory space for both memory and I/O, there is no difference I/O just occupies one of the memory locations (this is what MSP 430 has). Some processors have Separate I/O space separate from memory. These processors are called
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Unformatted text preview: Separate I/O mapped processors. An example of I/O mapped processors are Intel x86 processors. The disadvantage of full address decoding is a large amount of hardware is required, see the following example 15 inverters 2 8-input NAND gates 1 NOR gate ce & VMA = 0 for addresses 0000h-0FFFhex , the additional locations where ce goes low is called mirror / aliasing of the memory space Separate I/O mapped processors have special I/O instructions such as: IN address OUT address To access I/O in a memory-mapped processors the same instructions are used as for memory, example mov R1, label Memory-mapped I/O can always be added to a Separate I/O processors. Design a 16-Bit output port at 0xFFFF...
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  • Spring '11
  • Weeks
  • X86, Howard Staunton, Separate I/O, Separate I/O space

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