Experiment7 - EEE3007C0011 Electronics1Lab...

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Unformatted text preview: EEE3007C­0011 Electronics 1 Lab Monday 9:00 ­ 11:50 AM Experiment #7 Frequency Response of a Common Emitter Amplifier Stage By: Due Date: April 18, 2016 Objective: The objective of this experiment is to study the frequency response of a common emitter amplifier stage. The study will be done by first calculating the theoretical response on the amplifier. The amplifier will then be tested experimentally, the results of which will be used to verify the theoretical values. Equipment: ● ● ● ● ● ● ● ● Oscilloscope: Tektronix DPO 4034 Digital Oscilloscope Function Generator: Tektronix AFG3022 Dual Channel Function Generator Power Supply: Agilent E3630A 2N2222 Bipolar Transistors Breadboard Capacitors available in the labratory Resistors available in the laboratory LTspice IV Figure 1 Figure 1 is the design that has been experimentally tested. See Figure 2 for the additional capacitor locations for the high­frequency response test. Introduction: The metric for analyzing the frequency response during the course of this experiment was identifying the experimental and theoretical ­3 dB point under a set of conditions for the circuit shown in Figure 1. Bipolar junction transistors (BJTs) have three different regimes where capacitors present in the system exhibit a frequency response relative to the AC signal. The three regimes are low frequency, mid­frequency, and high frequency. Experiments conducted thus far in the course of this laboratory have only considered the mid­frequency regime, where capacitors in the system are treated as open circuits in the DC case and shorts in the AC case. Here, in the low frequency regime, the resistance of the capacitors must be taken into account in the AC case. For the high frequency case, the capacitors in the circuit are not considered, but the parasitic capacitance of the BJT must be considered. When measuring experimentally, additional capacitors on either side of the collector and emitter of the BJT (each with C​ ~100­400 pF) to 1,2​ make the response signal able to be measured on an oscilloscope. Pre­Lab: For the theoretical and experimental portions within this report, the circuit in Figure 1 was tested for high and low frequency responses (Note that this is the same common emitter circuit as in Experiment #4 in the mid­frequency regime, the results of which are available in the related report.). The values for the circuit components are as follows: R​ = 109.6 k Ω, R​ = 36.1 k Ω, R​ = 6.2 k Ω , R​ = 1.8 k Ω , R​ = 0 k Ω , R​ = 2.2 k Ω 1​ 2​ C​ E​ S​ L​ C​ = 200 pF, C​ = 100 pF, C​ = 100 μ F, C​ =C​ = 10 μ F, C​ = 10 μ F 1​ 2​ E​ S​ B​ L​ V​ = 12 V, and v​ is a varied frequency sinusoid. CC​ S​ The procedure for the pre­lab simulation is broken up into two parts, the low frequency and the high frequency tests. For the low frequency, the lower ­3 dB frequency was measured in simulation for two cases where a 0.1 μ F capacitor replaced C​ and then C​ . For the high S​ L​ frequency response, the latter circuit from the low frequency test was modified such that capacitors were connected between the base of the BJT and the emitter and collector, as shown in Figure 2. Note, that the top capacitor in Figure 2 corresponds to C​ and the bottom to C​ . It is 1​ 2​ possible for the high­frequency circuit to be considered a general case for thisexperiment where C​ = ∞ and C​ = ∞ . The purpose of placing the capacitors in the system for the high frequency 1​ 2​ case is to create a measureable frequency response, as the available BJT frequency response measurement at high frequencies would not be detectable. Therefore, theoretically within the hybrid­pi model for high frequency analysis, C μ = C​ and C π = C​ . ​ 1​ ​ 2​ Calculations: In part A of the low frequency section, approximating all capacitors, but C​ as short B​ circuits, at 5 kHz the value of V​ = 31.63dB. The cutoff frequency with only C​ included will be O ​ B​ the highest, which is why approximation can be used using only C​ . In order to calculate the B​ lower ­3dB frequency, V​ was set to 28.63 dB. The resulting frequency was calculated (through O​ approximation) to be 1.6 kHz. In part B of low frequency, again shorting all capacitors but C​ , at L​ frequency 5kHz, V​ was calculated to 32.67dB. Again, subtracting 3dB, the frequency at V​ = O​ O​ 29.67dB, was found to be 1.1 kHz. Due to approximation the frequency at ­3dB differs greatly from simulated and experimental results. However, the relationship between C​ and C​ values B​ L​ remains the same. If C​ has smaller capacitance than C​ , the lower ­3dB frequency will be higher B​ L​ than if C​ had smaller capacitance. L​ Simulation: Low Frequency: Figure P.A The above figure is the frequency analysis of figure 1, with C​ = 0.1 μ F, C​ = 10 μ F, and B​ L​ C​ = 100 μ F. Cursor 1 is set at 5 kHz, which is equivalent to 33 dB. In order to calculate the E​ lower ­3 dB frequency, cursor 2 is moved to 30 dB, which corresponds to 299.8 Hz. Figure P.B The above figure is the frequency analysis of figure 1, with C​ = 10 μ F, C​ = 0.1 μ F, and B​ L​ C​ = 100 μ F. Cursor 1 is set at 5 kHz, which is equivalent to 33 dB. In order to calculate the E​ lower ­3 dB frequency, cursor 2 is moved to 30 dB, which corresponds to 213.1 Hz. High Frequency: Figure P.H The above figure is the frequency analysis of figure 1, with C​ =10 μ F, C​ =10 μ F, and B​ L​ C​ =100 μ F. Capacitors C μ =200 pF and C E​ ​ π =100 pF are introduced into the circuit, shown as the ​ top and bottom capacitors in figure 2, respectively. Cursor 1 is set at 5kHz, which is equivalent to ­8 dB. In order to calculate the lower ­3 dB frequency, cursor 2 is moved to ­11 dB, which corresponds to 11.6 kHz. Experiment: The experimental procedure follows exactly the procedure for the pre­lab with measurements taken from an oscilloscope across the load resistor. In addition to the pre­lab procedure for the high frequency response, the ­3 dB point was measured after C μ and C ​ π were ​ removed. Figure 3a ​ shows the oscilloscope measurement for C​ = 10 μ F and C​ = 0.1 μ F in the low S​ L​ frequency regime (294 Hz input), which corresponds to a ­3 dB value of 303.13 Hz. Figure 3b​ shows the oscilloscope measurement for C​ = 0.1 μ F and C​ = 10 μ F in the low S​ L​ frequency regime (356 Hz input), which corresponds to a ­3 dB value of 355.00 Hz. Figure 3c ​ shows the oscilloscope measurement for C​ = 10 μ F and C​ = 10 μ F in the high S​ L​ frequency regime (13.5 kHz input) with C μ and C ​ π connected, which corresponds to a ­3 dB ​ value of 13.63 kHz. Figure 3d ​ shows the oscilloscope measurement for C​ = 10 μ F and C​ = 10 μ F in the high S​ L​ frequency regime (230 kHz input) with C μ ​ and C π ​ disconnected, which corresponds to a ­3 dB value of 20.0 kHz. Conclusion: To summarize, we have theoretically and experimentally explored the effects of capacitors within a common emitter BJT amplifier within the high and low frequency regimes. Within the low frequency regime, the resistance of the capacitors must be taken into account during the AC analysis of the amplifier. This is reflected experimentally by ­3 dB values of 355.00 Hz for C​ = 0.1 μ F and C​ = 10 μ F and 303.13 Hz for C​ = 10 μ F and C​ = 0.1 μ F. This S​ L​ S​ L​ corresponds to simulated values of 299.8 Hz for C​ = 0.1 μ F and C​ = 10 μ F and 213.1 Hz for C​ = S​ L​ S​ 10 μ F and C​ = 0.1 μ F. with some discrepancy. However, this can be explained as noise L​ interference with oscilloscope measurements that propagates through the mathematical function used on the oscilloscope to obtain the peaks. In the high frequency regime, the capacitors behave the same way as in the mid­frequency regime. However, parasitic capacitance from the BJT must be taken into account. This is accomplished by adding an intrinsic C μ and C ​ π within the AC analysis of the amplifier. ​ Experimentally, this parasitic capacitance corresponded to ­3 dB values of 13.63 kHz for C μ ​ and C π​ connected and 20.0 kHz when C μ ​ and C π ​ were removed. In comparison the simulation showed ­3 dB values of 11.6 kHz for C μ and C ​ π connected. ​ References: th​ Microelectronics­Circuit Analysis and Design, D. A. Neamen, McGraw­Hill, 4​ Edition, 2007, ISBN: 978­0­07­252362­1 ``` ...
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