lec09_-_cmos_characteristics - Copy

lec09_-_cmos_characteristics - Copy - Microelectronics(Part...

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1 Microelectronics (Part 3) Chapter 8: CMOS DC Characteristics
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Course Outcomes CO2: Ability to apply the semiconductor CMOS technology in digital circuits 2
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1-<3> Static CMOS Inverter DC Characteristics CMOS Inverter: The easiest logic gate Ideal behavior Modeling the MOS transistors as switches Y = A A Y 0 1 1 0 A Y
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1-<4> Static CMOS Inverter DC Characteristics CMOS Inverter: The easiest logic gate Ideal behavior Modeling the MOS transistors as switches “ideal” mean assume Input voltage 0 < V in < V th translated as logic 0 Output voltage V th < V in < V dd translated as logic 1
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DC Characteristics DC Response: V out vs. V in for a gate Ex: Inverter When V in = 0 -> V out = V DD When V in = V DD -> V out = 0 In between, V out depends on transistor size and current By KCL, must settle such that I dsn = |I dsp | We could solve equations But graphical solution gives more insight I dsn I dsp V out V DD V in
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Transistor Operation Current depends on region of transistor behavior For what V in and V out are nMOS and pMOS in Cutoff? Linear? Saturation?
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I-V Characteristics Make pMOS is wider than nMOS such that b n = b p V gsn5 V gsn4 V gsn3 V gsn2 V gsn1 V gsp5 V gsp4 V gsp3 V gsp2 V gsp1 V DD -V DD V dsn -V dsp -I dsp I dsn 0
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Current vs. V out , V in V in5 V in4 V in3 V in2 V in1 V in0 V in1 V in2 V in3 V in4 I dsn , |I dsp | V out V DD
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Load Line Analysis V in5 V in4 V in3 V in2 V in1 V in0 V in1 V in2 V in3 V in4 I dsn , |I dsp | V out V DD For a given V in : Plot I dsn , I dsp vs. V out V out must be where |currents| are equal in I dsn |I dsp | V out V DD V in
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Load Line Analysis V in0 V in0 I dsn , |I dsp | V out V DD V in = 0
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Load Line Analysis V in1 V in1 I dsn , |I dsp | V out V DD V in = 0.2V DD
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Load Line Analysis V in2 V in2 I dsn , |I dsp | V out V DD V in = 0.4V DD
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Load Line Analysis V in3 V in3 I dsn , |I dsp | V out V DD V in = 0.6V DD
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Load Line Analysis V in4 V in4 I dsn , |I dsp | V out V DD V in = 0.8V DD
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Load Line Analysis V in5 V in0 V in1 V in2 V in3 V in4 I dsn , |I dsp | V out V DD V in = V DD
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Load Line Summary V in5 V in4 V in3 V in2 V in1 V in0 V in1 V in2 V in3 V in4 I dsn , |I dsp | V out V DD
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