ECE201Notes(6-1)

ECE201Notes(6-1) - ECE 201 Digital Logic Chapter 6 1 of 22...

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ECE 201 Digital Logic Chapter 6 1 of 22 Flip-Flops and Simple Flip-Flop Applications 6.2 Latches S R Q Q’ 1 0 1 0 0 0 1 0 ( after S=1, R = 0 ) 0 1 0 1 0 0 0 1 ( after S=0, R = 1 ) 1 1 0 0 0 1 R Q S Q’ 0 0 ? ? ( after S=1, R = 1 ) SR Latch with NOR Gates R R R R R R 1 1 0 0 X X 0 0 1 1 0 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 1 0 0 0 0 0 0 Q Q Q Q Q Q S S S S S S Q’ Q’ Q’ Q’ Q’ Q’ SR Latch remaining SR Latch remaining at 0-1 output at 1-0 output
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ECE 201 Digital Logic Chapter 6 2 of 22 SR Latch transitioning from 1-1 input to 0-0 input. R R X X 0 1 1 1 1 1 1 0 0 0 0 1 0 0 0 0 0 0 1 0 1 1 Q Q S S Q’ Q’ x x x x 1. S-R start out at 1-1 . 2. S-R switch to 0-0 , producing 1-1 . R R 0 0 0 0 0 0 0 0 0 1 1 1 1 1 0 0 0 0 1 1 1 1 1 0 0 0 0 0 Q Q S S Q’ Q’ x x x x x x x x x x x x 3. The 1-1 feeds back, 4. producing a 0-0 , feeding back. .. SR Latch with NAND gates 0 1 R Q S Q’ S R Q Q’ 1 0 0 1 1 1 0 1 (after S=1, R = 0 ) 0 1 1 0 1 1 1 0 (after S=0, R = 1 ) 0 0 1 1 1 1 ? ? (after S=0, R = 0 ) ?
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ECE 201 Digital Logic Chapter 6 3 of 22 SR Latch with Control (Clock) Input R Clk Q S Q’ Q(t) S R Q(t+1) 0 0 0 0 0 0 1 0 0 1 0 1 0 1 1 Indeterminate 1 0 0 1 1 0 1 0 1 1 0 1 1 1 1 Indeterminate 00 01 11 10 0 1 1 1 1 X X Q Q S R SR Clk Q S R
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ECE 201 Digital Logic Chapter 6 4 of 22 Q(t+1) = S + R Q SR = 0
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ECE201Notes(6-1) - ECE 201 Digital Logic Chapter 6 1 of 22...

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