Quiz1F03 - EE319K Fall 2003 Quiz 1 Page 1 First Last This...

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EE319K Fall 2003 Quiz 1 Page 1 Jonathan W. Valvano September 26, 2003 11:00am-11:50am First:_________________ Last:_____________________ This is a closed book exam. You must put your answers on this piece of paper only. You have 50 minutes, so allocate your time accordingly. Please read the entire quiz before starting. (5) Question 1. Answer A,B,C,D,E (5) Question 2. Answer $00 to $FF (4) Part 3a. Specify RegB (2) Part 3b. Specify 0 or 1 (2) Part 3c. Specify 0 or 1 (2) Part 3d. Specify 0 or 1 (2) Part 3e. Specify 0 or 1 (10) Question 4. Specify D (10) Question 5. Show the machine code (10) Question 6. What value is pushed (10) Question 7. Simplified memory cycles (you may or may not need all 5 entries) R/W Addr Data changes
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EE319K Fall 2003 Quiz 1 Page 2 Jonathan W. Valvano September 26, 2003 11:00am-11:50am (40) Question 8. Write the assembly language program that implements a thermostat. PORTA equ $0000 PORTB equ $0001 DDRA equ $0002 DDRB equ $0003
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EE319K Fall 2003 Quiz 1 Page 3 Jonathan W. Valvano September 26, 2003 11:00am-11:50am These two tables interpret indexed-mode machine codes rr register 00 X 01 Y 10 SP 11 PC postbyte,xb syntax mode explanations rr000000 ,r IDX 5-bit constant, n=0 rr00nnnn n,r IDX 5-bit constant, n=0 to +15 rr01nnnn -n,r IDX 5-bit constant, n=-16 to -1 rr100nnn n,+r IDX pre-increment, n=1 to 8 rr101nnn n,-r IDX pre-decrement, n=1 to 8 rr110nnn n,r+ IDX post-increment, n=1 to 8 rr111nnn n,r- IDX post-decrement, n=1 to 8 111rr100 A,r IDX Reg A accumulator offset 111rr101 B,r IDX Reg B accumulator offset 111rr110 D,r IDX Reg D accumulator offset 111rr000 ff n,r IDX1 9-bit cons, n 16 to 255 111rr001 ff -n,r IDX1 9-bit const, n -256 to -16 111rr010 eeff n,r IDX2 16-bit const, any 16-bit n 111rr111 [D,r] [D,IDX] Reg D offset, indirect 111rr011 eeff [n,r] [IDX2] 16-bit constant, indirect
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EE319K Fall 2003 Quiz 1 Page 4 Jonathan W. Valvano September 26, 2003 11:00am-11:50am aba 8-bit add RegA+RegB abx unsigned add RegX+RegB aby unsigned add RegY+RegB adca 8-bit add with carry to RegA adcb 8-bit add with carry to RegB adda 8-bit add to RegA addb 8-bit add to RegB addd 16-bit add to RegD anda 8-bit logical and to RegA andb 8-bit logical and to RegB andcc 8-bit logical and to RegCC asl/lsl 8-bit left shift Memory asla/lsla 8-bit left shift RegA aslb/lslb 8-bit arith left shift RegB asld/lsld 16-bit left shift RegD asr 8-bit arith right shift Memory asra 8-bit arith right shift asrb 8-bit arith right shift to RegB bcc branch if carry clear bclr clear bits in memory bcs branch if carry set beq branch if result is zero (Z=1) bge branch if signed = bgnd enter background debug mode bgt branch if signed > bhi branch if unsigned > bhs branch if unsigned = bita 8-bit and with RegA, sets CCR bitb 8-bit and with RegB, sets CCR ble branch if signed = blo branch if unsigned < bls branch if unsigned = blt branch if signed < bmi branch if result is negative (N=1) bne branch if result is nonzero (Z=0)
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Quiz1F03 - EE319K Fall 2003 Quiz 1 Page 1 First Last This...

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