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Lab 1 - Digital Logic Fundamentals

# Lab 1 - Digital Logic Fundamentals - In this lab experiment...

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Lab 1 – Digital Logic Fundamentals In this lab experiment, you will design, implement, and verify a combinational logic circuit (CLC) derived from a given truth table. The design will be done as a LabVIEW virtual instrument (VI) . This lab requires some knowledge of fundamental digital logic concepts including basic logic gates and truth tables which are briefly discussed in the Theory section of this lab handout. Objectives Derive the Sum-of-Products and Product-of-Sums expressions from a given truth table. Design and implement a combinational logic circuit. Become familiar with the Logic Gate VI and FPGA I/O on the Spartan-3E Starter Board. Integrate a seven-segment display module. Background & Theory Truth Tables One common way to express the particular function of a logic circuit is called a truth table. Truth tables show all permutations of the inputs with their corresponding output values in terms of logic level states. Logic level states are typically expressed as 1 and 0, HIGH and LOW, or True and False. Figure 1 shows the schematic symbol and the truth table for an OR gate with two inputs. Figure 1 - OR Gate Schematic and Truth Table A gate or logic circuit’s truth table must have as many rows as there are possibilities for unique input combinations. For a single-input gate like the inverter, there are only two possibilities, 0 and 1. For a two-input gate, there are four possibilities (00, 01, 10, and 11), and thus four rows for the corresponding truth table. For a three-input logic device, there are eight possibilities and so forth. The input columns are typically written in binary order as shown below.

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Figure 2 - Three-Input Truth Table Sum-Of-Products & Product-Of-Sums
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Lab 1 - Digital Logic Fundamentals - In this lab experiment...

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