F03Final - test, 1011. 7 7) For the circuit below find: a)...

Info iconThis preview shows pages 1–9. Sign up to view the full content.

View Full Document Right Arrow Icon
12/09/03 55:138 Testing Digital Logic Circuits S.M. Reddy Final Exam Fall 2003 Name: 1) For the circuit given below, determine the list of collapsed faults using a)only fault equivalence at a gate b)fault equivalence and fault dominance at a gate 1
Background image of page 1

Info iconThis preview has intentionally blurred sections. Sign up to view the full version.

View Full DocumentRight Arrow Icon
2) For the circuit given below; show that, using implications only, a test for a) 11 s-a-0 b) 1 s-a-1 can be determined. 2
Background image of page 2
3) Find the controllability and observability of each of the lines in the circuit below using side-effect corrections. 3
Background image of page 3

Info iconThis preview has intentionally blurred sections. Sign up to view the full version.

View Full DocumentRight Arrow Icon
4) For the circuit given below derive a test sequence that detects 11 s-a-0 assuming an unknown initial state. 4
Background image of page 4
5
Background image of page 5

Info iconThis preview has intentionally blurred sections. Sign up to view the full version.

View Full DocumentRight Arrow Icon
5) Find the signal probabilities of each line in the circuit below. Use the accurate algorithm. 6
Background image of page 6
6) For the circuit below, determine all the AND & OR bridging faults detected by the
Background image of page 7

Info iconThis preview has intentionally blurred sections. Sign up to view the full version.

View Full DocumentRight Arrow Icon
Background image of page 8
Background image of page 9
This is the end of the preview. Sign up to access the rest of the document.

Unformatted text preview: test, 1011. 7 7) For the circuit below find: a) # of tests to exhaustively test the circuit b) maximum number of tests for pseudoexhaustive testing c) minimum number of tests for pseudoexhaustive testing d) show that the circuit can be tested using the minimum number of tests 8 8) Consider the following polynomial: P(x) = x 5 + x 3 + x 2 + 1 a) Construct a linear feedback shift register whose characteristic polynomial is P(x). b) Let the input sequence to the serial signature analyzer using the above linear feedback shift register be: (first in) - 1 1 0/1 1 1 0 1 1 Find the faulty & fault-free signatures. Is the fault detected? (Assume all initial states are 0) 9...
View Full Document

This test prep was uploaded on 04/22/2008 for the course EE 1 taught by Professor Dsd during the Fall '03 term at University of Iowa.

Page1 / 9

F03Final - test, 1011. 7 7) For the circuit below find: a)...

This preview shows document pages 1 - 9. Sign up to view the full document.

View Full Document Right Arrow Icon
Ask a homework question - tutors are online