lect 5 cpu organization singlecycle

lect 5 cpu organization singlecycle - The Big Picture:...

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CSE 141 Dean Tullsen Designing a Single Cycle Datapath or The Do-It-Yourself CPU Kit CSE 141 Dean Tullsen The Big Picture: Where are We Now? The Five Classic Components of a Computer Today’s Topic: Datapath Design, then Control Design Control Datapath Memory Processor Input Output CSE 141 Dean Tullsen The Big Picture: The Performance Perspective Processor design (datapath and control) will determine: Clock cycle time Clock cycles per instruction Starting today: Single cycle processor: ± Advantage: ?? ± Disadvantage: ?? ET = Insts * CPI * Cycle Time Execute an entire instruction CSE 141 Dean Tullsen We're ready to look at an implementation of the MIPS simplified to contain only: memory-reference instructions: lw, sw arithmetic-logical instructions: add, sub, and, or, slt control flow instructions: beq Generic Implementation: use the program counter (PC) to supply instruction address get the instruction from memory read registers use the instruction to decide exactly what to do All instructions use the ALU after reading the registers The Processor: Datapath & Control
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CSE 141 Dean Tullsen Review: The MIPS Instruction Formats All MIPS instructions are 32 bits long. The three instruction formats: R-type I-type J-type op target address 0 26 31 6 bits 26 bits op rs rt rd shamt funct 0 6 11 16 21 26 31 6 bits 6 bits 5 bits 5 bits 5 bits 5 bits op rs rt immediate 0 16 21 26 31 6 bits 16 bits 5 bits 5 bits CSE 141 Dean Tullsen The MIPS Subset R-type add rd, rs, rt sub, and, or, slt LOAD and STORE lw rt, rs, imm16 sw rt, rs, imm16 BRANCH: beq rs, rt, imm16 op rs rt rd shamt funct 0 6 11 16 21 26 31 6 bits 6 bits 5 bits 5 bits 5 bits 5 bits op rs rt immediate 0 16 21 26 31 6 bits 16 bits 5 bits 5 bits op rs rt displacement 0 16 21 26 31 6 bits 16 bits 5 bits 5 bits CSE 141 Dean Tullsen Where We’re Going – The High-level View Registers Register # Data Register # Data memory Address Data Register # PC Instruction ALU Instruction memory Address CSE 141 Dean Tullsen Review: Two Types of Logic Components State Element clk A B C = f(A,B,state) Combinational Logic A B C = f(A,B)
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CSE 141 Dean Tullsen Clocking Methodology All storage elements are clocked by the ________________ Clk Don’t Care Setup Hold . . . . . . . . . . . . Setup
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lect 5 cpu organization singlecycle - The Big Picture:...

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