Studio_4sol - the resulting minimised form is: F =

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Solutions to Studio 4 --------------------- 1) The Function first needs to be expanded into the standard form. Note that some terms do not contain all variables. The exapansion is done as follows: F = W'.1.Y'.Z' + W.X'.Y.Z' + W.1.Y.Z + W.X'.Y'.Z Since X+X' = 1; plug this back into the expression for F to obtain F = W'X'Y'Z' + W'XY'Z' + WX'YZ' + WXYZ + WX'YZ + WX'Y'Z Therefore we can write the Sum of Products form as : Sum(0,4,9,A,F,B) Hence the Product of Sums can be written as: Pi(1,2,3,5,6,7,8,C,D,E) In terms of variables this is: F = (W+X+Y+Z')(W+X+Y'+Z)(W+X+Y'+Z')(W+X'+Y+Z')(W+X'+Y'+Z)(W+X'+Y'+Z') (W'+X+Y+Z)(W'+X'+Y+Z)(W'+X'+Y+Z')(W'+X'+Y'+Z) The K-Map must be constrcuted according to the Sum of Product form as described earlier. The minimized expression is: F = W'Y'Z' + WYZ + WXZ' + WX'Y The minimised Product of Sum (POS) can be obtained by grouping the zeros in the K-Map used to obtain the SOP form.The rules followed are the same, but care needs to be taken when writing out the maxterms.
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Unformatted text preview: the resulting minimised form is: F = (W+Z').(W+Y').(W'+Y+Z).(W'+X'+Y).(X'+Y'+Z) The Sop from is preferrable, due to lesser number of gates needed.-----------------------------------2) A significant hint in the question is the use of the circuit to check parity. The simplest parity checker is the XOR gate. the truth table of the XOR gate is: 0 0 0 0 1 1 1 0 1 1 1 0 Hence, the circuit can be thought of as checking for an odd number of 1s in the input consisting of 2 bits. To extend this idea to multiple inputs, just cascade a number od XOR gates. For 5 inputs, XOR the first 2 inputs, then XOR the output of this gate with the third input and so on. This however will produce an odd parity checker. Eventually, an Inverter must be used before the actual output can be observed. Alternatively, a truth table for 5 inputs can be constructed, and the circuit impemented using AND/Or gates....
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Studio_4sol - the resulting minimised form is: F =

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