sample_test4 - ECSE 2610 Mid-Term Exam Spring 2002 Duration...

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Unformatted text preview: ECSE 2610 Mid-Term Exam, Spring, 2002 Duration 7 - 9 pm Student Name Section Number Student ID Number Email Address Exam Rules: This is a 2 hours exam. This is an Open Book and Notes exam. You are not allowed to consult with other students. You may not use a calculator, laptop, palmtop, PDA, or such computer. If you need more space, continue on the back sides of pages, but make sure to indicate the continuation. 1 2 3 4 5 6 7 8 Total 10 points 10 points 10 points 15 points 10 points 10 points 20 points 15 points 1 1. Given a 7-bit binary number 1111001, determine (10 points) its decimal value if it represents an unsigned number its decimal value if it represents a two's complement number its HEX representation its BCD representation as an unsigned number the ASCII character if it represents a character 2 3. Given the following function (10 points) F= (A + B +C + D')(A+ C + D) (A' + B + C)(C' + D) (a) Express the function in the canonical sum of products form (5 points). (b) Re-express the function in minimized product of sum form (5 points). 4 4. Given A=FE and B=7E, both represented as two's complement, compute A-B and B-A and indicate if over ow occurs for each case. Justify your answer (10 points). 5 5. Simplify the following expressions, using Boolean algebra (15 points). AC' + AB' + (AC)' + A'B'C (7 points) ((ABC')' (BC)'(A'C)'(A'B)')' (8 points) 6 6. Consider the following functions (10 points) F1= X(Y + Z) + X'Y'Z F2= X + Y' + Z' Implement these two functions using a single 74 138, one NAND gate. 74 x 138 G1 G2A G2B y0 y1 y2 y3 A B C y4 y5 y6 y7 7 7. Consider a 2-bit binary subtracter de ned as follows. The inputs A, B and C, D form the two 2-bit numbers N1 and N2. The circuit will compute the di erence N1 ; N2 on the output bits F (most signi cant) and G(least signi cant). Assume the circuit never sees an input combination in which N1 is less than N2, The output bits are don't care in these cases (20 points). (a) Fill in the 4-variable truth table for F and G. A B C D F G (b) Derive the minimum SOP for F and G using K-map. F AB CD CD G AB (c) Implement the sum of products expression from (b) using two 8:1 mux for both F and G. Draw the schematics and clearly label the inputs and outputs of each pin of the mux. 8:1 MUX En 8:1 MUX En I0 I1 I2 I3 I4 I5 I6 I7 s2 s1 s0 Y I0 I1 I2 I3 I4 I5 I6 I7 s2 s1 s0 Y 8 8. The following logic circuit consists of a 2-4 decoder and a 4-1 multiplexer. Its inputs are X, Y, S0, and S1 (where X is MSB and and S0 is LSB), and its output is F (15 points). D0 4-1 2-4 Y X decoder D1 mux D2 D3 F S1 S0 Derive the truth table of the logic diagram. X Y S1 S0 F Find the minimal sum of products expression for the diagram using K-map. XY S1S0 9 ...
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