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EE450_HW4

# EE450_HW4 - EE 450 Fall 2006 Homework#4 Due Thursday...

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EE 450, Fall 200 6 Homework #4 Due: T hur sday , October 5 th Read Chapter 3 , Sections 3.4.3 and 3.4.4 Read Chapter 5, Sections 5.1 and 5.2 1. A DLC protocol uses bit stuffing. Show the bit sequence transmitted over the link when the frame contains the following bit sequence: 110101111101011111101011111110 2. Suppose we want to transmit the message 1011001001001011 and protect it from errors using a generator polynomial x 8 +x 2 + x + 1. a) How many FCS bits are generated. What are they? What is the transmitted pattern? b) Suppose the left most bit of the transmitted pattern is inverted during transmission. What would the receiver decide? 3. Suppose you are designing a sliding window ARQ protocol for a 1 Mbps point-to-point link to the moon, which has a one-way latency of 1.25 seconds. Assume that each frame is 1 Kbyte long. What is the minimum number of bits you need for the sequence number? 4. Consider an ARQ protocol that uses NAKs only but no positive ACKs. Describe what timeouts would need to be scheduled. Explain why an

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