1. A standard MOSFET is fabricated with
ms
= 0.89 V, N
ss
= 5x10
10
cm
2
,
t
ox
= 50nm, N
A
= 10
15
cm
3
, and the area of the gate is A
G
= 10
3
cm
2
.
a.) Determine the flat band voltage.
b.) Determine the threshold voltage, V
T
.
c.) Choose whether the MOSFET is an enhancement mode or a depletion mode
MOSFET. Why?
d.) At V
GS
– V
T
= 3 V and V
DS
= 1V, the MOSFET described above exhibits drain
current, I
D
= 2.5 x 10
 4
A. Using the long channel device model, calculate the drain
current if V
GS
– V
T
= 3 V and V
DS
= 4 V.
e.) Consider the MOS transistor above biased in the circuit below. Assume that the
resistors, R, are large enough that negligible current flows through them
compared to the to the drain current, I
D
. Plot I
D
vs. V
DS
.
Solution:
a.) V
FB
=
ms
– qN
oc
/C
ox
=
ms
– qN
oc
t
ox
/
ox
= 0.89V – (1.6 x 10
19
Coul.)(5 x 10
10
cm
2
)(5 x 10
6
cm)/(3.45 x 10
13
F/cm)
= 0.89V0.116V = 1.006V
b.) V
T
= V
FB
+ 2
F
+
(2
F
)
1/2
= (2
s
qN
A
)
1/2
/C
ox
= 0.26 V
1/2
F
= V
t
ln(N
A
/n
i
) = 0.298V
V
T
= 1.01+0.596+0.26 x 0.77 = 0.21
c.) Since MOSFET conducts for V
GS
> V
T
and V
GS
= 0 > V
T
, the device conducts at
V
GS
= 0. Therefore it is a depletion mode MOSFET.
d.) V
GS
– V
T
= 3 V. When V
DS
= 1 V, the device is in the linear region since V
DS
<
V
GS
–V
T
. Therefore I
D
=
[(V
GS
V
T
)V
DS
– V
DS
2
/2] = 2.5 x 10
4
A and
can be
calculated to be
= 10
4
A/V
2
.
When V
DS
= 4V > V
GS
–V
T
, then I
D
=
[(V
GS
V
T
)]
2
= 4.5 x 10
4
A.
e.) V
GS
= V
DS
/2 because of the bias network. Thus V
GS
– V
T
= V
DS
/2 – V
T
.
Thus I
D
= I
Dsat
when V
DS
> V
DS
/2 – V
T
or V
DS
> 2V
T
.
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 Fall '07
 Dapkus
 Gate, Volt, VDS, Vgs

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