EE101Lecture6

EE101Lecture6 - Introduction to Digital Logic Lecture 6:...

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© Mark Redekopp, All rights reserved Introduction to Digital Logic Lecture 6: Minterms / Maxterms 2 & 3 Variable Theorems
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© Mark Redekopp, All rights reserved Application: Channel Selector • Given 4 input, digital music channels and 4 output channels • Given individual “select” inputs that select 1 input channel to be routed to 1 output channel Channel Selector ICH0 ICH1 ICH2 ICH3 OCH0 OCH1 OCH2 OCH3 ISEL0 ISEL1 ISEL2 ISEL3 OSEL0 OSEL1 OSEL2 OSEL3 4 Input channels 4 Output channels Input Channel Select Output Channel Select 011010101001101 101010110101010 101001010101111 001010101001011
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© Mark Redekopp, All rights reserved Application: Steering Logic • 4-input music channels (ICHx) – Select one input channel (use ISELx inputs) – Route to one output channel (use OSELx inputs) 011010101001101 101010110101010 101001010101111 001010101001011 ICH0 ICH1 ICH2 ICH3 IS EL 0 1 2 3 OSEL OSEL1 OSEL2 OSEL3 OCH 0 OCH 1 OCH 2 OCH 3
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© Mark Redekopp, All rights reserved Application: Steering Logic •1 st Level of AND gates act as barriers only passing 1 channel OR gates combines 3 streams of 0’s with the 1 channel that got passed (i.e. ICH1) •2 nd Level of AND gates passes the channel to only the selected output ICH0 ICH1 ICH2 ICH3 IS EL 0 ISEL 1 2 3 OSEL OSE L1 OSEL2 OSEL3 OCH 0 OCH 1 OCH 2 OCH 3 0001 0 0 0 1 0 0 0 ICH1 ICH1 1 0 0 0 ICH1 ICH1 ICH1 ICH1 ICH1 0 0 0 0100 OR: 0 + ICH1 + 0 + 0 = ICH1 AND:
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This note was uploaded on 02/27/2008 for the course EE 101 taught by Professor Redekopp during the Fall '06 term at USC.

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EE101Lecture6 - Introduction to Digital Logic Lecture 6:...

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