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Unformatted text preview: 1 Finite State Machines Finite State Machines (FSMs) (FSMs) ECSE2610 Co mputer C omponents & O perations (CoCO) Fall 2006 10/30/06 2 Recap: Synchronous FSM Recap: Synchronous FSM Fundamental concept in systems: State = a set of variables that, together with the system input(s), contains all the information necessary to determine the output(s) and the next value of the state. A Finite State Machine (FSM) can be described by a state diagram which shows a sequence of state transitions like this: Synchronous here means the change of state happens only on the clocking event. Current State [output] New State [output] Current Input(s) 3 Recap: 3bit Binary Counter State Diagram Recap: 3bit Binary Counter State Diagram We usually put input labels on arrows, but this counter has no inputs. It just counts clock ticks. 000 001 Each circle corresponds to a state 010 110 101 100 111 011 000 001 110 101 100 111 011 Arrows represent state transitions 010 010 The label inside each circle describes the state 4 Counters vs FSMs Counters vs FSMs Counters: Simple sequential circuits State = Output No inputs Simple singlepath sequencing through the states General Finite State Machines: Outputs are Function of State (and Inputs) Next States are Functions of State and Inputs Used to implement circuits that control other circuits "Decision Making" or Control logic Counters are a Simple Form of Finite State Machine 5 FSM Example: Odd Parity Checker FSM Example: Odd Parity Checker Outputs a 1 at next clock tick when input bit stream up to now has odd # of 1's Even [0] Odd [1] Reset 1 1 State Diagram Present State Even Even Odd Odd Input 0 1 0 1 Next State Even Odd Odd Even Output 0 0 1 1 Symbolic State Transition Table Output 0 0 1 1 Next State 0 1 1 Input 0 1 0 1 Present State 0 0 1...
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This homework help was uploaded on 04/22/2008 for the course ECSE 2610 taught by Professor Ji during the Spring '08 term at Rensselaer Polytechnic Institute.
 Spring '08
 Ji

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