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Unformatted text preview: The I/O Subsystem The I/O subsystem is concerned with the work of providing the virtual interface to the hardware. This is the cod ethat has to deal with the idisyncracies of devices, converting from the OS’s logical view to the messy realities of the hardware. I/O Hardware As we’ve discussed before a general purpose computer system usually has several peripherals con- nected to an I/O bus. Scheduling transfers across the bus and often moving data is the job of the OS. System CPU ctrl dev ctrl dev ctrl dev Bus memory Frequently, devices are not directly connected to the bus, but are managed by controllers. This allows multiple devices to share a single bus slot. Bus slots may be a scarce resource. Device controllers are also a frequent location for additional intelligence in the network. Devices or controllers are frequently controlled by accessing device registers, which pass parameters from CPU to device (or controller). Such device registers are either accessible through special I/O instruc- tions or by memory mapping the device regiaters into the processor’s address space. 1 The Operating System is also responsible for coordinating the interrupts generated by the devices (and controllers). Generally a priority ordering is used. Some devices can have their handlers interrupted by higher priority devices. Depending on the srevices offered by the hardware, this may result in interrupts being delayed or even lost. If a system blocks rather than delaying interrupts, the system must poll device state when a high-priority interrupt returns in case a low-priority interrupt has been lost. Direct Memory Access (DMA) In simple systems, the CPU must move each data byte to or from the bus susing a LOAD or STORE instruction, as if the data were being moved to memory. This quickly usues up much of the CPU’s compu- tational power. In order to allow systems to support high I/O utilization while the CPU is getting usefultational power....
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This note was uploaded on 02/28/2008 for the course CS 402 taught by Professor Tedfaber during the Spring '05 term at USC.
- Spring '05