Experiment 3

Experiment 3 - Experiment 3 CPE 269 10/17/2006 Jonathan...

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Experiment 3 CPE 269 10/17/2006 Jonathan Lyons Colin McKinney Bench #14
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Description of Circuit Function This circuit acts as a Twisted Ring counter. When D_EN is high, the circuit starts in state ST0 and parallels D_LOAD into D_OUT. With D_EN still high, the circuit will move into state ST1 where SEL = ‘11’, DR_IN = ‘1’. D_OUT is shifted to the left and the value of DR_IN is placed in the right most bit. With D_EN still high, once D_OUT(7) = ‘1’, the circuit will change to state ST2. Here, SEL=’11’ and the bits are still shifting to the left. However, DR_IN = ‘0’, which will effectively clear the values for D_OUT from right to left. Once D_OUT(7) = ‘0’ or D_EN=’0’, the circuit will revert back to state ST0. Circuit Block Diagram Figure 1: Block Diagram for the Overall Circuit Questions 1. We would have to make sure SEL = ‘10’ to initialize shifts to the right. Also, a value for DL_IN would have to be added to replace the shifted bits on the leftmost side. Also, we would have to make sure the state change condition relies on D_OUT(0) instead of D_OUT(7). 2. If we were to use the outputs of the shift register as states in the FSM, we would have
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Experiment 3 - Experiment 3 CPE 269 10/17/2006 Jonathan...

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