153a - CS153A Practice Questions Pipelining and Memory

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Unformatted text preview: CS153A Practice Questions Pipelining and Memory Mapping------------------------------------------------------------------ 1) What are the pipeline stages in the TMS320C31 and what do they do? they are: Fetch - gets the next instruction to be executed from memory Decode - decodes the next instruction to be executed and generates the address if there is one Read - loads operands from memory if there are any needed by the instruction Execute - reads from the register, performs the operation specified by the instruction, writes the result into the register or stores it at a location in memory 2) What are the 3 things that get in the way of perfect pipeline speedup and why? they are: Data Dependencies - when a future instruction uses some data is dependent on certain instructions before it, therefore you have to wait for that to happen before you can run the future instruction with the correct data Structural Hazards - when the hardware isn't enough to fit the needs of all the instructions in the pipeline Control Dependencies - there are brances in the program so until a certain instruction is reached the program doesn't know which instruction it will have to execute at the branch 3) What is Amdahl's law? His law is that the performance improvement to be gained from using a faster mode of execution is limited by the fraction of the time the faster mode can be used. 4) Why do we need pipelining? Because it improves throughput of a system. ******I TRIED THESE TOO BEFORE I KNEW WE DIDN'T NEED TO. EXTRA CREDIT?? **** 6) Show with an example and explanation why a 1-bit predictor doesn't work well for most loops? State the potential prediction accuracy and the accuracy that a 1-bit predictor achieves. a 1 bit predictor doesn't work well with most loops because it will cause mispredictions e.g. a loop for (i=0 i<9; i++) { do something } first and last time through the loop it will cause mispredictions. first time it will predict not going into the loop because it had never been there before whilst last time it will predict going into the loop because, the last time that is what it had done. Therefore it will have only 80% accuracy even though the potential accuracy could be 100% Name/Perm:Smaranda Velichi / 382736 7) Describe the 2-bit dynamic hardware branch predictor. (Give state diagram) State why this addresses the problem with the 1-bit predictor above. the two bit dynamic hardware branch predictor must miss a prediction twice before it gets changed. therefore a branch from a loop only gets mispredicted once per loop execution, the second time it happens as opposed to one bit prediction that would mispredict twice each time the loop is run. a branch gets resolved after which the 2 bit counter is updated. the values it can take are 00, 01, 10, 11. 2 are for taking a branch, 2 for not taking it....
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153a - CS153A Practice Questions Pipelining and Memory

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