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Unformatted text preview: UNIVERSITY OF CALIFORNIA, SANTA BARBARA DEPARTMENT OE ELECTRICAL & COMPUTER ENGINEERING
CIRCUITS 85 ELECTRONICS I ECE 137A
PROFESSOR TIIEOCARAJAN MIDTERM EXAM, FEBRUARY 13, 2009 Name: 5:? [4110492 This is Open book and open notes exam. For all questions make reasonable approximations. Unless otherwise speciﬁed ignore body effect. Relevant equations are given at the back of the
examination for your convenience . GOOD LUCK! Answer the questions in the spaces provided on the question sheets. If you
run out Of room for an answer, continue on the back of the page. Question Points Seorei 1 35
2 30
3 35 ' ECE 137A Midterm Exam February 13, 2009 1. Question 1: 35points a As you are perusing your old 2C notes you come across the Op—arnp RC integrator.You
wonder what would happen if you replace the resistor with a MOSFET biased in the
linear region as shown in ﬁgure 1. NOTE: Linear does not mean you can ignore the V35
dependency, please use the full linear equation for the entire problem. Figure 1: Circuit for Question 1 (a) (10 points) Derive an expression for the output voltage Vow as a function of Vm
and Va Im : l4n (95') (VA~ V‘HA — Vila) Vin ECE 137A Midterm Exam (Continued) February 13, 2009 You notice however when 14” is large that the circuit exhibits non—linear behavior
due to the Vdri term. You share this with your ECE 137A professor who shows you
the circuit in in ﬁgure a where all the transistors are identical and biased to be
operating in the linear region and says that this should solve all your problems. In ii
II b All transistors are identically sized and equal to W/L Figure 2: Improved Circuit for Question 1 (b) (10 points) Derive expressions for the currents I1, [2, [3, I4 and [C is there a rela—
tionship between them? Page 2 of 10 ECE 137A Midterm Exam (Continued) February 137 2009 (C) (.5 points) Qualitatwely explain how Circuit works and why it; solves the issues with
the V33 term The auxVFW? carver/fr I; ﬁx +ke d‘qevence loe‘l'wee"
I\ anJ I: I am! “A: Va: '+€t‘V\/\ Ts Sub—barre; CHAT, it o‘ePenAg On‘kj 0Y1 (VA ”VIS)V““ T’Ie Seams, 077. CUM/3 Gaffes +¢xe (Lu/rear I"? “7'74” 51‘5‘1’73/
00n+ro[/€J A)! [/8 awe} reverses H's chi ecifi‘nz/ , SUL‘f/‘AC‘Hrla.
’f‘f GIN m H'e c arremf #w’m HI 6 +17! V’ 5 ’37” 0"“7‘70/I’3J by
VA , ‘Hﬁs (ante/S acq‘ +he (/ng non/{hparFly S‘n (c Err/‘14
"h‘ai’ls‘i‘s‘fﬁr lame "HM? Sam 6 (/4 g Qi’kfﬂfiéml by +146 MM“ 8’0“” o4 1w “WWII/"f 4% +0 negAme f‘eeJéack Page 3 of 10 ECE 137A Midterm Exam (Continued) February 13, 2009 (d) (10 points) Derive an expression for the output voltage V0,“! as a function of WMVQ
and Vb AVOULT r. '7‘; kn(%)(VA— “3)th 4t;
“t *j E‘— kn(»”"C)CVA vngcn at Q Page 4 of 10 ECE 137A Midterm Exam (Continued) February 13, 2009 Question 2: 30points Transistors, especially BJT’s are highly nonlinear devices. However, one can exploit this non—linearity to design new computational circuits. One useful embodiment of this is
shown in figure 3 Figure 3: Circuit for Question 2a (a) (15 points) What function does this circuit implement i.e. derive [out in terms of
IT, [y and [Z V\ ‘* V2 " V3 “V4 :0 => V.1'Vz ”V3 = V‘f 'imlii) weagrgwﬁ—ri
Vz EZIJH(%) Vs: "EMA—:55) Page 5 of 10 ECE 137A February 137 2009 33/: ﬁ 3/5 Page 6 of 10 ECE 137A Midterm Exam (Continued) February 13, 2009 3. Question 3: 35points The cascode is useful technique that you will learn later, in this problem you will learn
how to optimally bias the cascocle. As supply voltages shrink every small bit counts so
we generally would like to bias our MOS devices at the edge of saturation i.e. For an N MOS device W3 2 V05 v Vm Now V95 — Vm keeps appearing everywhere so circuit designers have developed a short—
hand for it and some call it chf for the eﬂective voltage that drives the transistor. If two
transistor are place in series, as shown in ﬁgure 5, then the minimum gate voltage that
they both can posses while having them both in saturation can be derived as follows.
Both transistors carry the same current therefore they must have the same gate source
voltages the minimum Vds for the bottom transistor is Veff, therefore the gate voltage
of the top device needs to offset by a Veff resulting in V2” + 2V6” as shown in ﬁgure 5. Figure 5: Circuit for Question 3a (a) (5 points) Design the resistor R such that you can generate this bias, you need to
only come up with an equation (V8 — V63)
K Vén +2ve99 44“ 4944
' :1 Ihq‘ R : Iﬁq Page 7 of 10 ECE 137A Midterm Exam (Continued) February 13., 2009 vg: vm+2veﬁ Figure 6: Circuit for Question 31) (b) (5 points) Now consider the Circuit in ﬁgure 6, this gives the same voltage generated
in part a, What region are M3 85 M4 operating? why? SMCE "Hue, 30d? 94V ’44, and M3 are conncd'ed and 'HW , ' k \ . J ‘ , A)
Camposd’e Jew.55 ,3 connected I") 0x JDaJe' cog—[vumfﬁ‘a/g and no CLtV/‘eﬂt' is heir? mer: our)“ OJ. 4416 mJJ/e node) Where +ke +000 devices ”deer, —H«e Conn/dog”? device ’LS \ "4 Sod’uro‘ﬁam‘ 71‘23 :‘n ‘fvm I‘M/plies ﬂtd‘ MS —> 1 \
(near Mq *9 Soduféfﬁan ‘ Page 8 0f 10 ECE 137A Midterm Exam (Continued) February 13, 2009 (c) (25 points) Size M3 and M4 such that the right voltage is generated.(Hmt: W/L of all transistm‘s are related). .. \ , w ._, (A) ~—‘
Pl: we P'Ck (7:)4 " (7:). , “We“ V634 ‘: V83 Since bO'HA Mtt CMA Mt “we Vx Carrylné ‘er Same; Current 1m M4 V3: thf'z V34“: Page 9 0f 10 ...
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