Lecture_7_1_RTA_and_diffusion

Lecture_7_1_RTA_and_diffusion - Lecture 7.1 Furnace Anneal...

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Furnace Anneal (FA), Rapid Thermal Anneal (RTA), Diffusion Lecture 7.1
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IH2655 Spring 2009 Mikael Östling KTH Doping : Introduce a certain number and type of impurities into silicon with accurate doping profile. MOSFET: Well, Gate, Source/Drain, Channel, etc. BJT: Base, Emitter, Collector, etc. Application: B E C p p n+ n- p+ p+ n+ n+ BJT p well NMOS
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IH2655 Spring 2009 Mikael Östling KTH Basic Concept 9 Junction Depth x j 9 Sheet Resistance R s 9 Solubility
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IH2655 Spring 2009 Mikael Östling KTH 1. Junction Depth x i x j : At the position x = x j , C x (Diffused Impurity Concentration) = C B (Bulk Concentration) 9 When devices are scaled down by a factor of k , constant-field scaling principle requires x j should also be scaled down by k . Simultaneously, 9 Increased x j is required Short Channel Effects, DIBL (drain induced barrier lowing) In modern COMS technology, shallow junction and high- concentration doping are used to meet both the two requirements
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IH2655 Spring 2009 Mikael Östling KTH DIBL: Drain induced barrier lowering
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IH2655 Spring 2009 Mikael Östling KTH L BC CSE= Charge Sharing Effect CSE DIBL DIBL= Drain Induced Barrier Lowering V DS V t Log I D V G CSE V t1 DIBL V t2 Depletion region
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IH2655 Spring 2009 Mikael Östling KTH Short Channel Effect: Qualitative Explanation The source/drain p-n junctions participate in the depletion effects on silicon located under the gate. They compete against the gate for the charge control. The shorter the gate length L g is, the more charge is controlled by the source and drain. As a result, the threshold voltage V T varies with L g . Okuno et al ., 2005 IEDM Large L g : S D Small L g : D S X j n+ n+ V G p depletion region x dep
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IH2655 Spring 2009 Mikael Östling KTH Thermal budget crisis RTA is needed for formation of shallow junction below 0.25 μ mCMOS technology
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IH2655 Spring 2009 Mikael Östling KTH RTA versus FA
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IH2655 Spring 2009 Mikael Östling KTH Furnace anneal (FA) Horizontal furnaces have now largely been replaced by vertical furnaces Ex: ASM Advance 400 series Possible alternative: Rapid thermal heating (in between RTA and FA) for rates of 10-100 C/s In the future(?): Ultra-high vacuum (UHV) furnaces
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IH2655 Spring 2009 Mikael Östling KTH RTA Ramp rate: 50-300 C/s Largest concern: Temperature control Temperature non-uniformity due to varying emissivity
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IH2655 Spring 2009 Mikael Östling KTH RTA: Frequently integrated in single-wafer cluster tools RTA for: Anneal and ultra-shallow junction formation Oxidation (RTO) Silicon epitaxy (in particular high-temp epi) CVD of poly and dielectrics (e.g. Centura modules) Silicides (Ti salicide process)
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Diffusion in Silicon
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IH2655 Spring 2009 Mikael Östling KTH Diffusion in silicon Introduction Technology for diffusion Solid solubility Intrinsic diffusion and diffusion constant Extrinsic diffusion and electrical field effect Microscopic description Phosphorus diffusion Diffusion during thermal oxidation Diffusion in polysilicon Characterization
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This note was uploaded on 03/09/2009 for the course EE 300 taught by Professor Y during the Spring '09 term at CUNY City.

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Lecture_7_1_RTA_and_diffusion - Lecture 7.1 Furnace Anneal...

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