{[ promptMessage ]}

Bookmark it

{[ promptMessage ]}

3055q5f - Score Name I b ECE 3055 Quiz V Wednesday October...

Info iconThis preview shows page 1. Sign up to view the full content.

View Full Document Right Arrow Icon
Background image of page 1
This is the end of the preview. Sign up to access the rest of the document.

Unformatted text preview: Score: Name: I\) b) ECE 3055 Quiz V, Wednesday, October 1, 2008 The program code for an algorithm needed for a critical calculation requires 106 instructions. If the processor has a 4 CPU. clock and an average CPI of 0.75 how many times per second could the program for this algorithm be run? (Note: Assume the piocessor is not running any other programs) log Kt: _ 0‘,“ TV / -Lr: sax/"er“ ~ '- 0 710 Sec :‘gm "3 ‘1 ‘2') The program can execute at most J a“ 7 - times per second (3 pls). A new Intel CPU with six processor cores is about to appear in the market. An important application program contains 40% purely sequential code that has to run on a single processor and the remaining code could be redone to run evenly in parallel on six processors. What is the maximum execution time speedup on this application program that could be obtained over that ofa single processor at the same clock rate? (Note: Ignore the increased communication and synchronization time that would likely slow down multiple processors a bit from the maximum possible speedup from Amdahl s Law, SWX times faster_ than before the improvement) Q. _._ , ‘1 r 4 o -1 ~ . 3‘ / 1% : 1, (a ' I On six processors a maximum speedup of 2. could be obtained on the application code (4 pts) A designer is considering two hardware options to improve the performance of a processor. They both require almost the same amount of hardware but there is only space for one on the processor chip. (3 pts) Option 1: Improves the Cache by adding hardware and lowers the existing average CPI from I 35 to 1. 21 on benchmark simulations by lowering the cache’s miss rate and the resulting pipeline stalls Everything else remains unchanged. q l 0:: k i 3 :j l- up: :D /.———/—-' 2 :f’T \1“ I") ~11: 361.116 l-li The Cache impiovements achieve an execution time speedup of [ l6 Option 2: Adds hardware for an improved floating point ALU that runs ten times faster on floating point operations. The projected workload for the computer currently performs floating point operations 10% of the program execution time ~C?+“'Tci;”:."'?l )4?! 59’0“ The floating point ALU achieves a speedup of i 098 on the projected workload. Option 1 gives the best performance improvement for the processor. ...
View Full Document

{[ snackBarMessage ]}