cpe229_FSM_review - CPE 229 FSM Review Notes Copyright 2005...

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Unformatted text preview: CPE 229 FSM Review Notes Copyright: 2005 Bryan Mealy The Roots of Memory All digital circuits can be classified into one of two categories: combinatorial circuits and sequential circuits. The one and only difference between these two circuits is the existence of a feedback path from the output of the circuit to the input. While this does not seem too impressive, the resulting circuit actually is amazing impressive. The existence of the feedback path allows the circuit to have ”memory”. This memory is nothing more then the ability to store bits (as in binary digits) of information. This ability opens up an entire new area of digital design that is inherently different from combinatorial circuits which you are probably more used to working with. The nice thing about the world of digital design is that there are a relatively small number “standard” digital circuits out there. Once you understand the workings of these circuits, you can construct just about any digital circuit you can imagine. In other words, the building blocks of digital design are relatively simple; the perceived complexity of designs occurs only because of the number of these building blocks. In your brief encounters in CPE 129 (or CPE 219), you’ve hopefully encountered and worked with most of these building blocks. Some of the common combinatorial and sequential circuits that you should have been exposed to in these courses are listed in Table 1. Combinatorial Circuits Sequential Circuits Multiplexors (MUXes) Flip-flops Decoders Registers Encoders Shift registers Arithmetic Circuits (adders, subtractors, etc.) Counters Comparators Parity generators Table 1: A list of standard digital circuits. One of the two basic memory cells is shown in Figure 1 in two different configurations. These configurations are equivalent but are drawn differently for dramatic effect. The circuit in Figure 1(a) highlights that fact that there is one and only one feedback path, a fact that is not readily apparent from Figure 1(b). The circuit in Figure 1(b) is the more accepted method of drawing the circuit. The circuit in Figure 1(b) is referred to by several different names including latch , NOR latch , SR latch , cross-coupled NOR cell . There is a roughly equivalent circuit using NAND gates (cross-coupled NAND cell) but we’ll not discuss that here in this review. (a) (b) Figure 1: The standard memory cell drawn shown in two different configurations. Since sequential circuits have the ability to remember bits, we can start referring to circuits as having a state . And since these circuits have a state, we can start referring to them as state machines , or, finite state 1 CPE 229 Lecture 12 Notes machines (FSMs). This provides an interesting way to view the circuits, namely, we can start referring to the circuits as having a present state (PS) and a next-state (NS) . In this context, the present state is represented by the current state of the memory element while the next state is, for lack of a better...
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  • Spring '09
  • smith
  • Flip-flop, FSMs, ps/ns table

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