cpe229_lec14 - CPE 229 Course Notes Lecture 14 Copyright...

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CPE 229 Course Notes: Lecture 14 Copyright: 2005 Bryan Mealy The Two-Day Approach to Computer Design In previous sets of notes, we’ve talked about two of the three basic building blocks of a computer: the ALU and the memory. At this point in the course, we have enough information to construct a basic computer. Although we’ve not said much about the I/O portion of a computer, we’ll be doing that in the final week of the course once you get some actual assembly language programming experience. By that time, it will be easier to talk about and the topic and it will make more sense. This set of notes represents the culmination of many of the previous sets of notes. The approach we’ll take in this set of notes is to assemble many of the circuits we’ve previously discussed is such a way as to form the building blocks of a functional computer. Although this computer is exceedingly basic, it roughly presents many of the important aspects of basic computer design. If you’ve never worked with basic computer architectures before, this represents an introduction to the topic. In this case, please realize that there are many approaches to computer design. This is the two-day approach; be sure to check out other sources of computer design material for a more complete story. Assembling a Basic Computer: The Memory Two sets of notes ago, we discussed some of the basic features of memory. The black box model we arrived at in those previous notes is shown in Figure 1(a). The highlights of this model are the control lines (CS, OE, and WE), the address lines, and the bi-directional data lines. The address lines are shown in bus format and generally connect to a system bus referred to as the address bus . Both the address and control lines are uni-directional. The data lines are also in bus format and generally connect to a system bus referred to as the data bus . The data lines are bi-directional and tri-stated which allows data to be read from the device (READ) and written to the device (WRITE). The three control lines allow the device to be accessed for both reading and writing. In an effort to keep track of system signals, the names of the inputs have been modified for the following discussion. Since these signals are associated with memory, the letter “M” as been appended to each of the control signals in Figure 1(a) with the results shown in Figure 1(b). Recall that the MCS (memory chip select) and must be asserted each time memory is accessed for either reading or writing. Reading data requires the MOE (memory output enable) to be asserted and essentially controls the tri-state buffers of the bi-directional output. Write operations require that the MWR (memory write) signal be asserted. For this discussion, we’ve made the signals active high in an effort to simplify the following discussion. The size of the memory does not matter for now but the general thought is that this device can access 2 m memory locations each of which stores n-bits of information. (a)
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