Cpe229_lec21 - CPE 229 Course Notes Lecture 21 Copyright 2005 Bryan Mealy Backing-Up a Step to I/O As you know by now PicoBlaze is a soft-core

Info iconThis preview shows pages 1–2. Sign up to view the full content.

View Full Document Right Arrow Icon
CPE 229 Course Notes: Lecture 21 Copyright: 2005 Bryan Mealy Backing-Up a Step to I/O As you know by now, PicoBlaze is a “soft-core” microcontroller. This refers to the fact that, unlike other microcontrollers, I can’t order a PicoBlaze integrated circuit (IC), or chip, from the electronics store. PicoBlaze is currently modeled using VHDL. More specifically, PicoBlaze is primarily modeled using Xilinx VHDL primitives 1 . The use of these primitives has two effects. First, because the primitives are effectively black box descriptions, it is somewhat complicated to figure out how exactly the device performs by simply looking at the circuit. This is because it is not always obvious what the primitive in question is doing. In most digital circuits, a quick perusal of the circuit diagram or VHDL code provides a clue to how the circuit functions. This is not the case for circuits modeled using Xilinx primitives. The second effect that using the primitives has is that it forces PicoBlaze to only be implemented using the Xilinx ISE software. The intended use of PicoBlaze is to download the device onto the fabric of a Xilinx FPGA. PicoBlaze could easily be defined using standard VHDL code but using the Xilinx primitives was Xilinx’s way of self-promotion in that they did not want you to be able to easily construct the microcontroller using the tools from another company. While this practice does not completely promote the spirit of learning, it’s fairly typical approach taken by most companies. This is one of the many reasons why moving from PicoBlaze to the ESX processor is still a good idea. Unfortunately, documentation and supporting experiments for the ESX MCU are still in the works. Once these are in place, CPE 229 will be a much better course. Students who take the course will learn more and be more prepared for monster classes such as CPE 329. There are two approaches to actually using PicoBlaze in a real environment. Before we discuss these approaches, you must realize that PicoBlaze is truly a functional device. It does have many limitations, but people are actually using PicoBlaze in actual products outside of academia. It’s fun to joke about the limitations of PicoBlaze, but these limitations bring with it speed, simplicity, and a relatively small footprint. In other words, you could drop a couple of PicoBlaze modules in parallel, design other parts of your system (namely I/O) properly, and you’d have a system with considerable throughput due to its parallel processing capabilities. An implementation of PicoBlaze on an FPGA requires about 93 CLBs which represents about one tenth of the logic resources available on the SpartanII device onboard the D2 board used in the CPE 269 lab. The two approaches to implementing a PicoBlaze “system” are in a single PLD (PicoBlaze with wrapper such as we did in CPE 269) or a as a single module with external interface hardware. This set of notes looks briefly into both of these approaches. We’ll frame this discussion in the
Background image of page 1

Info iconThis preview has intentionally blurred sections. Sign up to view the full version.

View Full DocumentRight Arrow Icon
Image of page 2
This is the end of the preview. Sign up to access the rest of the document.

This note was uploaded on 03/27/2009 for the course CPE 229 taught by Professor Smith during the Spring '09 term at Cal Poly.

Page1 / 5

Cpe229_lec21 - CPE 229 Course Notes Lecture 21 Copyright 2005 Bryan Mealy Backing-Up a Step to I/O As you know by now PicoBlaze is a soft-core

This preview shows document pages 1 - 2. Sign up to view the full document.

View Full Document Right Arrow Icon
Ask a homework question - tutors are online