BrookeECE51_07_Logic_part_2

BrookeECE51_07_Logic_part_2 - Chapter 8 MOS Memory and...

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Chapter 8 MOS Memory and Storage Circuits Microelectronic Circuit Design Richard C. Jaeger Travis N. Blalock
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Chapter Goals Overall memory chip organization Static memory circuits using the six-transistor cell Dynamic memory circuits Sense amplifier circuits used to read data from memory cells Learn about row and address decoders Implementation of CPU registers via flip-flops Pass transistor logic Read Only Memory
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Static Memory Cells Inverters configured as shown in the above figure form the basic static storage building block These cross-coupled inverters are often referred to as a latch The circuit uses positive feedback
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Static Memory Cells VTC The previous latch has only two stable states and is termed bistable However, it is possible for it to be held at an unstable equilibrium point where slight changes in the voltage will cause it to latch in one of the stable states
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The 6-T Cell With the addition of two control transistors it is possible to create the 6-T cell which stores both the true and complemented values of the data
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Dynamic Memory Cells The 1-T cell uses a capacitor for its storage element (data is represented as either a presence or absence of a charge) Due to leakage currents of M A , the data will eventually be corrupted, hence it needs to be refreshed
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Data Storage in a 1-T Cell Storing a “0” Storing a “1”
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Address Decoders Complete 3-bit domino CMOS NAND decoder
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Data Transmission through the Pass- Transistor Decoder
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D-Latch using T-Gates A very important circuit of digital systems is the D-Latch which is used for a D Flip-Flop Whenever clock C goes high in the D-Latch, the data on D is passed through to Q
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Master-Slave D Flip-Flop By using series D- Latches that latch the data on opposite clock phases, a master-slave D flip-flop can be realized
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End of Chapter 8
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Chapter 9 Bipolar Logic Circuits Microelectronic Circuit Design Richard C. Jaeger Travis N. Blalock
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Chapter Goals Bipolar switching circuits Emitter-coupled logic (ECL/CML) Behavior of the bipolar transistor as a saturated switch Transistor-transistor logic (TTL) Schottky clamping techniques for preventing saturation Operation of the transistor in the inverse-active region Voltage reference design BiCMOS logic circuits
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The Current Switch (Emitter-Coupled Pair) The building block of emitter-coupled logic (ECL) is the current switch circuit which consists of matched components
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BrookeECE51_07_Logic_part_2 - Chapter 8 MOS Memory and...

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