ECE_5360_lab__4 - Lab 4 Patterning the Source/Drain Ion...

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Lab # 4 Patterning the Source/Drain Ion Implant In this lab, you will receive your wafers back in the same condition as you left them in Lab # 3. You will then apply photoresist on top of your patterned Field Oxide using the spinner and then pattern the resist with the mask aligner. There is a significant difference in this week’s alignment procedure: Now the resist pattern must be aligned to the pattern in the etched oxide. Alignment aids and their use will be described and implemented in this lab. After development, the resist pattern on a transistor will be examined in relationship to the Field Oxide etched pattern in the inspection microscope. Finally, the alignment error will be measured using the verniers on the masks. Lab Experiment: (in the lab) 1. Source/Drain Implant Patterning: Background: Patterning of the ion implanted regions is used to define the source/drain regions regions for transistors in conjunction with the Field Oxide. For diodes, the implanted region defines the emitter (heavily doped side of diode). The implanted region also forms conducting region for the semiconductor resistors. Figure 1. Mask layout comparing Level 1 on Level 2 to the full process layout for transistors (left) and other devices (right). Shown above in Figure 1 is the Level 2 mask (Ion implant pattern) overlaid on single transistor single transistor (FOX and implant layer only) FOX and implant layer only FOX and implant layer only Coplanar waveguide transistor (FOX and implant layer only) Coplanar waveguide transistors TLM pattern Resistors Van de Pauw p-n diode Schottky diode FOX capacitor GOX capacitor
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Level 1 (Field Oxide etch), and compared with all four levels for transistors (left) and the other devices (right). 2. Resist Application: Same as Lab #3 3. Resist Exposure with the Contact Aligner (MA-6): In this lab, the TAs will have the MA-6 will be in the state where you are ready to load your wafer. The second level mask will be installed in the aligner. a. To load a wafer: Same as in lab #3, through the step where the machine does its wedge error correction, and tells you when it is OK to proceed. You are now ready to align to Level 1. 4. Alignment of Level 2 to Level 1: a. Decrease the separation of the mask and the wafer to 20 microns using the separation control arrows. The LCD will display the separation. b. Using the arrow keys on the keypad, move the microscope objectives over an
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This note was uploaded on 04/04/2009 for the course ECE 5360 taught by Professor Shealy during the Fall '07 term at Cornell.

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ECE_5360_lab__4 - Lab 4 Patterning the Source/Drain Ion...

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