lab1 - State University of New York at Stony Brook...

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State University of New York at Stony Brook Department of Electrical and Computer Engineering ESE 2f8 Digital Systems Design Spring 2009 Lab 1. part l: Breadboard and logic analyzer All experiments in this lab will be done on the C.A.D.E.T. II electronic designer module shown in Figure 1. This module includes o Removable breadboard: four SK-10 sockets with 840 tie-points r Three power supplies: o fixed + 5 V DC (0. ..1 A, ripple < 5 mV) for TTL integrated circuits o variable +1.3. ..+15 V DC (0. ..150 mA, ripple < 5 mV) for digital CMOS and analog integrated circuits o fixed amplitude AC 60H2, 12.6V RMS, (0. .100 mA), center tapped o Function generator: o frequency range 0.1 H2. ..100 kHz in six ranges o output voltage amplitude 0 . ..10V (20 Vp-p) o output waveforms: sin, square, triangle, TTL rise and fall times . TTL pulse: < 25 ns r square wave: < 0.5 ps r 16 LED logic indicators with input impedance 100 kOhm: o 8 red to indicate logic high (for TTL + 2.2. ..+ 5 V\ o 8 green to indicate logic low (for TTL 0. ..+ 0.8 V) r Logic probe to indicate logical high level, logical low level and single-shot event Trigger detects single shot event and holds indication until pulse /memory switch is toggled . Debounced pushbuttons: two open-collector pulsers - one nornally open, one normally closed. The outputs can sink up to 250 mA r Potentiometers: I kohm and l0 kOhm o BNC connector: shell connected to ground o Switches: o 8 logic switches select logic high or logic low (ground). High level is switchable between the fixed + 5 V (TTL) and the variable + I .3 . .15 V (CMOS) supplies o 2 slide switches with Single Pole Double Throw (SPDT) set of contacts . Speaker 8 Ohm,0.25 W o BCD-to-7-segment decoder and display for indication binary codes corresponding to 0. .9
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r -...1r.;J $r{EES Figure l l: The C.A.D.E.T TTL/CMOS electronic designer module 1.1 Before any experiment The following precautions must be taken before the module is turned on: The two switches labeled 5 V and + V should be set to the 5 V position. One of these switches is located in the Logic Switches block, and the other is in the LEDs block. Setting these switches will ensure that your circuits get proper TTL level inputs and expect TTL level outputs. Five volts is considered logic 'l', and ground (GND) is considered logic '0'. The switch labele.d TTL & CMOS should be set to the TTL position. This ensures that the logic LED indicators display either a '1' (red) or a '0' (green) when a high or low TTL level voltage is received. Both adjustment knobs should be turned exffemely counter-clockwise. This safeguards against an inadvertent connection of your circuit to the * V or - V power rail. If these connections are ever made, your TTL circuit will be powered by whatever voltage settings these adjustments were set for. Any setting above 7 volts will cause the connected TTL chips to explode! This could damage the entire C.A.D.E.T module and the rest of your circuit, Therefore, this is the most important precaution to take before turning on the module. 6',1
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This note was uploaded on 04/12/2009 for the course ESE 218 taught by Professor Donetsky during the Spring '08 term at SUNY Stony Brook.

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lab1 - State University of New York at Stony Brook...

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