This preview shows pages 1–2. Sign up to view the full content.
This preview has intentionally blurred sections. Sign up to view the full version.
View Full Document
Unformatted text preview: connected to GND. Calculate the voltage drop on V o , if: (a) Only A changes to 1 (VDD=2V) during the evaluate phase. (b) Both A and B change to 1 (VDD=2V) during the evaluate phase. 4. Design a dynamic logic circuit with ve inputs: A, B, C, D, and E, and two outputs: F1 = (AB+CD) and F2=(F1+E) . You may choose whatever style you like (e.g., domino, differential domino, zipper . ..) 5. Design a 1bit full adder using differential domino structure. Minimize the number of transistors (you may want to try the binary dicision diagram (BDD) approach to see whether it can reduce the number of transistors). 6. Problems 6.26 and 6.37 in the textbook. 2...
View
Full
Document
This note was uploaded on 04/14/2009 for the course ECSE 4220 taught by Professor Mcdonald during the Spring '08 term at Rensselaer Polytechnic Institute.
 Spring '08
 McDonald

Click to edit the document details