CHAP_2_SOLUTIONS_SET_1

CHAP_2_SOLUTIONS_SET_1 - EE 311 Digital Hardware...

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EE 311 Digital Hardware Organization Chapter 2 Homework Solutions (Set 1) 2.1. The proof is as follows: (x + y)(x + z) = xx + xz + xy + yz = x + xz + xy + yz = x(1 + z + y) + yz = x(1) + yz = x + yz 2.2. The proof is as follows: (x + y)(x + y ) = xx + xy+xy + yy = x + xy + xy + 0 = x(1 + y + y) = x(1) = x 2.3. Manipulate the left hand side as follows: xy + yz + xz = xy + (x + x)yz + xz = xy + xyz + xyz + xz = xy(1 + z) + xz(y + 1) = xy(1) + x(1)z = xy + xz 2.4. Proof using Venn diagrams:
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2.5 Proof of Theorem 15a using Venn diagrams: xy + Proof of Theorem 15b using Venn diagrams:
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2.8 The timing diagram below displays all waveforms that can be observed on all wires of the circuit assuming all gates are ideal. Note that non-ideal gates would possess non-identical time delays, resulting in “glitches”, or spikes at their outputs when the inputs change values simultaneously. This effect would be exacerbated by the fact that the inverters in the circuit would create additional time delays before inputs A and B could reflect the changes in the input variables x 2 and x 3 .
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This note was uploaded on 04/29/2008 for the course EE 101 taught by Professor Gutschlag during the Fall '07 term at Bradley.

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CHAP_2_SOLUTIONS_SET_1 - EE 311 Digital Hardware...

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