HW 9 ans - [email protected] - icl.syr.edu ELE232 Electrical...

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[email protected] - icl.syr.edu ELE232 – Electrical Fundaments II – 4APR2008 Homework 9 - Due: Friday, 11APR2008 Problem 1 : This is a biasing arrangement that uses an FET as a drain resistor. The key to analyzing this problem is to note that the drain currents must be the same for each transistor. The transistors are identical with V T = 3v and K = 0.2 ma/v 2 . (a) Calculate a value of V DS1 using the hint above. (b) Find a value for I D . (c) Calculate a value for g m for the lower transistor. Answer : (a) Determine, from the circuit diagram, expressions for V GS2 and V GS1 . V GS 2 = 20v ! V DS 1 . V GS 1 = V DS 1 since no current flows in the 10M resistor (insulated gate FET.) Now write expressions for I D for each transistor and set them equal since they are in series. K 20 ! V DS 1 ! V T ( ) 2 = K V DS 1 ! V T ( ) 2 . 20 ! V DS 1 = V DS 1 . Thus V DS 1 = 10v . I D = 0.2ms / v 2 10v ! 3v ( ) 2 = 9.8ma . (c) g m = K(V GS 1 ! V T ) = 0.2ma / v 2 10v ! 3v ( ) = 1.4mmhos . Problem 2 :
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This note was uploaded on 05/02/2008 for the course ELE 232 taught by Professor Phelps during the Spring '08 term at Syracuse.

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HW 9 ans - [email protected] - icl.syr.edu ELE232 Electrical...

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