hw4soln

Hw4soln - ECE 152A Fall 2006 University of California Santa Barbara Department of Electrical and Computer Engineering ECE 152A Digital Design

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ECE 152A – Fall 2006 11/7/2006 Homework #4 Solution – Page 1 of 31 University of California, Santa Barbara Department of Electrical and Computer Engineering ECE 152A – Digital Design Principles Homework #4 – Solution Problem #1. A JN flip flop is constructed by (internally) complementing the K input to an otherwise normal JK flip flop. For the JN flip flop, derive the following: 1. The characteristic table 2. The characteristic equation
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ECE 152A – Fall 2006 11/7/2006 Homework #4 Solution – Page 2 of 31 3. The state table 4. The state diagram 5. The excitation table
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ECE 152A – Fall 2006 11/7/2006 Homework #4 Solution – Page 3 of 31 Problem #2. Design a 2-bit, binary up/down counter. The counter has 2 inputs, up_down and enable. The truth table below defines the operation of the counter: enable up_down | operation 0 0 | hold count 0 1 | hold count 1 0 | decrement count 1 1 | increment count Use positive edge triggered JK flip flops. In your answer, include (1) a state diagram, (2) a state table, (3) a next state map and (4) all Kmaps used in determining flip flop inputs
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ECE 152A – Fall 2006 11/7/2006 Homework #4 Solution – Page 4 of 31
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ECE 152A – Fall 2006 11/7/2006 Homework #4 Solution – Page 5 of 31
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ECE 152A – Fall 2006 11/7/2006 Homework #4 Solution – Page 6 of 31 Problem #3. Design a three bit counter with a single input called mode . The counter counts in binary if the mode bit is zero, and counts in gray code if the mode bit is one (recall the three bit gray code is 000, 001, 011, 010, 110, 111, 101, 100). The mode bit can change at any time during the count sequence and your counter should begin counting in the new mode on the next clock input. Design the counter using JK flip flops. You don’t have to draw the logic diagram, specifying the J and K inputs to each flip flop is sufficient. Use A, B and C as the state variable names. Include (1) a state table, (2) next state maps and (3) K-maps for all flip flop inputs.
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ECE 152A – Fall 2006 11/7/2006 Homework #4 Solution – Page 7 of 31
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ECE 152A – Fall 2006 11/7/2006 Homework #4 Solution – Page 8 of 31
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11/7/2006 Homework #4 Solution – Page 9 of 31 Problem #4. Consider the flip flop illustrated below:
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This note was uploaded on 04/30/2008 for the course ECE 152a taught by Professor Johnson during the Summer '07 term at UCSB.

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Hw4soln - ECE 152A Fall 2006 University of California Santa Barbara Department of Electrical and Computer Engineering ECE 152A Digital Design

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