E1.9 Computer Systems 2002

E1.9 Computer Systems 2002 - (IE: 9 Paper Number(s): E1.9...

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Unformatted text preview: (IE: 9 Paper Number(s): E1.9 IMPERIAL COLLEGE OF SCIENCE, TECHNOLOBY AND MEDICINE UNIVERSITY OF LONDON DEPARTMENT OF ELECTRICAL AND ELECTRONIC ENGINEERING EXAMINATIONS 2002 EEE PART I: M.Eng., B.Eng., and ACGI COMPUTER SYSTEMS Monday, 10 June 2:00 pm There are FIVE questions on this paper Answer TWO questions from Section A and ONE question from Section B Section A is open—book Section B is closed-book Use a separate answer book for each section Corrected .w h "3 Time allowed: Section A 1:30 hours Section B 1:00 hours Examiners responsible: First marker(s): Cheung, P.Y.K, Demiris, Y.K. Second marker(s): Demiris, Y.K., Shanahan, M.S. Section A (Please use a separate answer book for each Section.) 1. Consider the following code fragment in ARM assembly language. b) d) MOV r1, #0 MOV r0, #10 LOOPl STR r0, [r1], #4 SUBS r0, r0, #1 ENE LOOPl MOV r1, #0 MOV r0, #5 LOOPZ LDR r2, [r1, #20] LDR r3, [r1] ADD r2, r2, r3 STR r2, [r1], #4 SUBS r0, r0, #1 ENE LOOP2 Write down an order list of memory locations, which are accessed by this code fragment, showing the memory address and data, and whether it is a read or a write access. [8 marks] Assuming that the microprocessor takes lOOns per clock cycle, all instructions with and without data memory access take 2 and l clock cycles respectively, state how long this code fragment will take to execute. [2 marks] Assume that the microprocessor uses 32 bytes of direct-mapped cache for data only, and each cache line is 4 bytes. Further assume that the entire data cache is dirty at the start of the code fragment. How many memory accesses result in cache ‘hit’ and cache ‘miss’ respectively when this code fragment is executed? [7 marks] As a result of using cache in the microprocessor, each clock cycle is shortened to 10ns. The cache miss penalty is lZOns. How long will this code fragment take to execute as a result of using cache? [3 marks] Page 2 of 6 Run-length coding is a method of compression where repeated data values are represented by a repeat count (i.e. the length of the run) followed by the data value itself. For example a sequence of byte values (in hexadecimal) 4A 4A 4A 4A 4A 4A 09 O9 O9 00 A7 A7 A7 A7 69 01 is compressed to: 06 4A 03 09 01 00 04 A7 01 69 The repeat count value has a maximum value of 255 and the data value are from O to 255. a) Write a subroutine RunLength in ARM assembly language for the following specification: Subroutine RunLength — run—length compress a block of data stored as bytes Input parameters: rl — starting address of data to be compressed r2 — starting address of output buffer where compressed data is to be stored r3 — no of bytes to be compressed Return parameters: None The output format should be: <repeat_count> <byte_value> <repeat_count> <byte_value> [10 marks] b) An alternative run—length encoding rule is given below: i) If (datavalue = O) or (run-length > 3), encode it as <OO> <repeat_count> <byte_value> ii) For all other situations, the data are left as they are (ie. no encoding is applied). Therefore, the above byte sequence will be encoded as: 00 06 4A 09 09 O9 00 01 00 00 04 A7 69 Modify the subroutine in a) to implement this encoding rule. [10 marks] Page 3 of 6 3. The following ARM code fragment processes the characters in a NULL—terminated string. In order to use the code, r0 should point to the start of the string. Loop LDRB rl, [r0], #1 CMP r1, #0 BE (5; finished CMP rl, #'A’ BLT loop CMP rl, #’Z’ BGT loop SUB r2, rl, #’A’—‘a’ STRB r2, [r0, #-1] B loop finished a) What is the effect of executing the above code on a string? [3 marks] b) Re-write the above code to make it into a subroutine called “TL” that could be called from the program below as shown. Use an “empty decreasing” stack. AREA prog, CODE, READONLY SWI_EXit EQU &ll ENTRY MOV r1, #0 MOV r2, #5 L1 ADR rO, string BL TL SWI SWI_EXit string = “Hello World!”, OXOa, OXOd, 0 END [6 marks] c) In the program shown above, the value of label L1 is 0x8080 and the stack pointer has value OXlOOO before entry into the subroutine. State and justify the value of the link register during execution of subroutine TL. [3 marks] d) Draw a diagram showing the numerical addresses and numerical contents of the stack immediately after pushing the necessary data onto the stack. (Assume that no intervening code marked “. . alters either register rl or register r2). [4 marks] e) You are provided with a subroutine “printc” which prints the character in register r2 to a connected peripheral device. An example use is shown below. MOV r2, #’A' BL printc Re-write your subroutine so that it also calls printc for each character of the modified string [4 marks] Page 4 of 6 C, k I E Section B Corrected Copy Use a separate answer book for each section. Answer ONLY QUESTION 1 : (i) (ii) (iii) (iv) QUESTION 2: (i) (ii) (iii) ONE of the following two questions Describe the round—robin process scheduling algorithm and list its advantages and disadvantages For the following set of processes with their corresponding duration, arrival times and priority levels [higher number indicates a higher priority]: a. Show the order of execution (including timing information) of the processes if the scheduler implements the following scheduling algorithms: i. Shortest remaining job first (SRJ F) ii. Priority scheduling without pre—emption iii. Priority scheduling with pre—emption b. For each of the algorithms calculate the average waiting time, and the average turnaround time. Arrival time (ms) Priority level Describe the Optimal, First—In-First-Out (FIFO), and Least—Recently—Used (LRU) page replacement algorithms, and list their advantages and disadvantages. In the context of memory management, describe the condition known as “thrashing” When is a set of processes deadlocked? In the context of deadlock avoidance, describe what it means for a system state to be “safe”. Describe the difference between an unsafe state and a deadlock state. A system has 14 instances of a resource type and there are currently four processes running; their maximum needs and their current allocation are shown in the table below. Determine whether the current state is a safe state, and show why. Assume that the system is using banker’s algorithm for dynamic deadlock avoidance. Given the current state below, determine the algorithm’s response [i.e. grant or refuse request] for the following allocation requests. Explain your answer. i. Process C requests 1 instance Page 5 of 6 [4] [2] [2] l2] [2] [7] [1] [2] [2] [2] [2] Paper E1.9 (iv) ii. Process B requests 4 instances iii. Process D requests 4 instances In the “producer-consumer” problem, two processes are communicating through a buffer that can hold 0 to n items. The producer process continuously produces items and places them in the buffer, while the consumer continuously fetches items from the buffer and consumes them. The following conditions are in place: The producer process can only place items in the buffer if there is space available in the buffer — it blocks otherwise. The consumer process can fetch items from the buffer only if there are items available —- it blocks otherwise. Mutual exclusion is required: the producer and the consumer processes cannot access the buffer at the same time. Using semaphores to ensure that the conditions above hold, provide Pascal procedures for the producer and consumer processes. Declare and properly initialise all semaphores you use. The data type Semaphore, and the standard semaphore primitives init(Sem, number), wait(Sem), and signal(Sem) are available. You may assume that the following procedures are also available: produce_item, write‘item, get_item, consume_item, and that the constant “n ” has been declared. Page 6 of 6 [2] [2] [8] Paper 1319 5. 6cm 0 p A Answer to Question 1 PAVEJL E 1'0] 21) Address (hex) Data (hex) R/W hit/miss (for Part c. ) 0000 0000 000A W Miss 0004 0000 0009 W Miss 0008 0000 0008 W Miss 000C 0000 0007 W Miss 0010 w Miss 0014 0000 0005 W Miss 0018 0000 0004 W Miss 001C 0000 0003 W Miss 0020 0000 0002 W Miss 0024 0000 0001 W Miss 0014 0000 0005 R Hit 0000 0000 000A R Miss 0000 0000 OOOF W Hit 0018 0000 0004 R Hit 0004 0000 0009 R Hit 0004 0000 GOOD W Hit 001C 0000 0003 R Hit 0008 0000 0008 R Hit 0008 0000 000B W Hit 0020 0000 0002 R Hit 000C 0000 0007 R Miss 000C 0000 0009 W Hit 0024 0000 0001 R Hit 0010 0000 0006 R Miss 0010 0000 0007 W Hit [8 marks] b) 89 cycles @ 100ns = 8.9 microseconds. [2 marks] 0) 14 ‘miss’, 1 1 ‘hit’ (see table above). ‘ [7 marks] d) 89 x 10ns + 14 x 110 ns = 2.43 microseconds. [3 marks] Page of4 EL 9 Answer to Question 2 21) RunLength STMED r13!, (rO—r6, ADD r6, r1, r3 ; Start_loop MOV r4, #1 ; LDB r5, [r1], #1 ; loop2 CMP r1,r6 ; BCS finished ; CMP r4, #$ff ; BEQ end_run ; LDB r0, [r1], #1 ; CMP r0, r5 ; BNE end_run ; ADD r4, r4, #1 ; B loop2 ; end_run MOV r4, [r2], #1 ; MOV r5, [r2], #1 ; B start_loop ; finished LDMED r131, {rO—r6, pc} END b) RunLengch STMED r131, {rO—r6, r14}; ADD r6, r1, r3 ; start_1oop MOV r4, #1 ; LDB r5, [r1], #1 ; loop2 CMP rl,r6 ; BCS finished ; CMP r4, #sff ; BEQ end_run ; LDB r0, [r1], #1 ; CMP r0, r5 ; BNE end_run ; ADD r4, r4, #1 ; B Loop2 ; ; so far same as before end_run CMP r5, #0 ; BEQ run_encode CMP r4, #03 ; BHI run_encode ; no_encode MOV r5, [r2], #1 ; SUB r4, r4, #1 ; BNE no_encode B start_loop ; I ; if gets here, run_encode MOV r0, #0 MOV r4, [r2], #1 MOV r5, [r2], #1 B start_loop finished LDMED r131, {rO—r6, END run—length encode r14) ; preserve context r6 has last address of buffer + 1 r4 counts the run—length fetch a byte if reached terminating address finished, else if run—length is maximum output current data else get the next byte if not the same, terminate run and output else increment run—length count loop back for another test output run—length output data value loop back for more [10 marks] preserve context r6 has last address of buffer + 1 r4 counts the run—length fetch a byte if reached terminating address finished, else if run-length is maximum output current data else get the next byte if not the same, terminate run and output else increment run—length count loop back for another test if data is zero, run—length encode else if run—length > 3 encode it, else just output data . the required no of times loop back for more 0 is special code ; output run—length ; output data value ; loop back for more DC} [10 marks] "L 2} Page )6 of A Answers to Question 3 This question tests the students understanding of stacks and subroutine calls in assembly language. a) This code converts any upper-case characters in the string to their equivalent lower—case characters. Any other characters remain unchanged. The modified string overwrites the original string. [3 marks] b) One possible solution is shown below. TL STMED r131, {rO, rl, r2} loop LDRB r1, [r0], #1 CMP rl, #0 BEQ ret CMP rl, #’A’ BLT loop CMP rl, #’Z’ BGT loop SUB r2, r1, #’A’—‘a’ STRB r2, [r0, #—1] B loop ret LDMED r13!, {1:0, rl,r2} MOV pc, r14 Two marks for PUSHing r0, r1 and r2, two marks for POPing r0, r1 and r2 back in the correct order. One mark for using the correct pair (STMED, LDMED) of stack instructions. Whether r14 is pushed or whether lr is moved into pc doesn’t matter — award one mark for each of these solutions. Deduct one mark per unnecessary register PUSHed or POPed. [6 marks] c) ADR instruction has address 0x8080, BL instruction has address 0x8084, SW1 instruction has address 0x8088. The link register (r14) will therefore hold the value 0x8088 during execution of subroutine TL. [3 marks] (1) Answers will vary depending on solution to (b), but for the solution given above: Address Data 0x 1000 0x0005 OXOFFC 0x0000 0x0FF8 0x808C One mark for correctly recognizing an EMPTY stack, one mark for correctly recognizing a DECREASING stack. One mark for recognizing that addresses differ by 4 bytes. One mark for ordering the data in the correct way. [4 marks] c) This question tests nested subroutines. The key modification necessary is to store the link register. One possible solution is shown below 13 . Page of } ‘l ~23 TL loop print ret One mark for inserting the BL instruction, one mark for recognizing the need to save and one mark for recognizing the need to restore the link register. One mark for printing ALL characters of the STMED113I, {r0, r1, r2, r14} LDRB r1, [r0], #1 CMP r1, #0 BBQ ret CMP rl, #’A’ BLT print CMP rl, #’Z’ BGT print SUB r2, r1, #’A’—‘a’ STRB r2, [r0, #-1] BL printc B loop LDMEDIlBE, {r0, r1, r2, r14} MOV pc, r14 modified string (not just the modified characters) A 1r Pagegof4 [41narks] ./ .c[rc U = MWJIA'T E1.9 — section B: Operating Systems a q _ 4; . 01 Model answers to exam questions 2002 Question 1 : (i) The Round robin scheduling algorithm allocates the CPU to a process for a time quantum (or time slice). If the process is still running at the end of the quantum, it is pre-empted and CPU is given to the next process in the ready queue. The preempted process is put at the end of the queue. New processes are also added at the end of the queue. Advantages: Simple to implement; fair. Disadvantages: Difficult to determine appropriate time quantum - too small: good response time, but large overheads - too large: bad response time. on SRJF III DIIIIIII= 012345678 Average waiting time: (0+l+0+1) / 4 = 0.5 ms Average turnaround time: (2+6+1+6) / 4 = 15 / 4 = 3.75 ms Priority Scheduling {without pre-emption) 9 1011 1213 I415 A III-IIIIIIIIII BII cllll======== III DP!!!!!I IIII 678910111213l415 Average waiting time: (0+0+8+0) / 4 = 2 ms Average turnaround time: (2+5+9+5) / 4 = 21 / 4 = 5.25 ms Priority Scheduling gwith pre—emptiom IIIEIIIIIIIIIII - D III- |23 6789101112131415 Average waiting time: (0+6+0+0) / 4 = 1.5 ms Average turnaround time: (2+11+1+5) / 4 = 19/4 = 4.75 ms (iii) (a) Optimal page replacement algorithm: replaces the page that will not be used for the longest period of time. Advantages: Lowest page-fault rate of all algorithms Disadvantages: Difficult to impossible to implement — we need to know in ff 47 advance the stream of page requests. (b) FIFO: replaces the page that has been in memory for the longest time. Advantages: easy to understand and implement (FIFO queue) Disadvantages: sub-optimal performance — does not account for usage of pages. (c) LRU: replaces the page that has not been used for the longest time. Advantages: good performance Disadvantages: not easy to implement (iv) Thrashing: the processor spends more time swapping memory pieces than executing instructions. Question 2: (i) A set of processes is deadlocked if each of the processes in the set is waiting for an event (e.g. a resource to become available) that only another process in the set can cause. (ii) A state is safe if the system can allocate resources to each of the processes (up to the maximum declared by that process) in some order, and avoid a deadlock. An unsafe state is NOT a deadlock state; it may lead to it. (iii) (a) Current state is safe — resources can be allocated in a specific order (e.g. A->C—>D->B, note that there are other sequences too) so system can avoid a deadlock. (b) -I: It will grant the request; the resulting state is safe (A—>C->D—>B) —II: It will refuse the request since it leads to an unsafe state -IH: It will refuse the request since it leads to an unsafe state (iv) Producer—consumer problem var item, space, mutex: Semaphore; init(item,0); init(space,n); init(mutex,l); Producer process: Procedure producer() Begin While(TRUE) do Begin Produce_item; Wait(space); Wait(mutex); Write_item; Si gnal(mutex); Si gnal(item); End; End; Consumer grocess: Procedure producerO Begin While(TRUE) do Begin Wait(item); Wait(mutex); get_item; Si gnal(mutex); Si gnal(space); Consume_item; End; End; ...
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This note was uploaded on 05/01/2008 for the course EE Computer taught by Professor Shumgum during the Spring '08 term at Imperial College.

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E1.9 Computer Systems 2002 - (IE: 9 Paper Number(s): E1.9...

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