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1 Digital Design Copyright © 2006 Frank Vahid ECE 474a/575a Susan Lysecky 1 of 71 ECE 474A/57A Computer-Aided Logic Design Lecture 2 Datapath Elements Digital Design Copyright © 2006 Frank Vahid ECE 474a/575a Susan Lysecky 2 of 71 Datapath Elements Datapath components store/transform data, put components together to form a datapath Needed when we cover register-transfer-level (RTL) design Datapath components Muxes Decoder Shifters - N-bit, Barrel Comparators - Equality, Magnitude Adders - Two-level, Half, Full, Carry-Ripple Registers - Parallel load, Shift, Rotate, Mulit-function Counters - Increment, Decrement, Up, Down, Up/down, Parallel Load Subtractor ALUs (Arithmetic-Logic Unit)** Register Files Digital Design Copyright © 2006 Frank Vahid ECE 474a/575a Susan Lysecky 3 of 71 Multiplexer (MUX) Functionality and Implementation x2 x1 f 0 0 0 1 1 0 1 1 s 0 0 0 0 0 0 0 1 1 0 1 1 1 1 1 1 0 1 0 1 0 0 1 1 truth table 2x1 mux x2 x1 s f definition 2×1 x2 x1 s 1 f 2×1 x2 x1 s 0 f example f = s’x1 + sx2 logic expression (optimized) s f x1 x2 circuit implementation graphical symbol 0 1 s f x1 x2 Routes one of its N data inputs to its one output, based on binary value of select inputs
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