28-Memory - Memory Copyright : Nahrstedt, Angrave,...

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Copyright ©: Nahrstedt, Angrave, Abdelzaher 1 Memory  
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Copyright ©: Nahrstedt, Angrave, Abdelzaher 2 Memory Learning Objectives Overlays & Fixed Partitions Internal Fragmentation Why separate queues are inefficient Virtual Addresses: Relocation using Base Register  Dynamic contiguous allocation  Bitmaps versus linked lists Allocation Schemes (Best,First, Worst, Next)
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Copyright ©: Nahrstedt, Angrave, Abdelzaher 3 Overlays Overlay Manager Overlay Area Main Program Overlay 1 Overlay 2 Overlay 3 Secondary Storage Overlay 1 Overlay 2 Overlay 3 0K 5k 7k 12k
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Copyright ©: Nahrstedt, Angrave, Abdelzaher 4 Fixed Partitions Legend Free Space 0k 4k 16k 64k 128k Internal fragmentation (cannot be  reallocated)
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Copyright ©: Nahrstedt, Angrave, Abdelzaher 5 Fixed Partition  Allocation Implementation Separate input queue for each partition Put incoming jobs into separate partition queues Inefficient utilization of memory (small jobs still wait)   Soln: One single input queue for all partitions.  Allocate a partition where the job fits and use… Best Fit  Worst Fit First Fit 
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Copyright ©: Nahrstedt, Angrave, Abdelzaher 6 Virtual addresses "Any programming problem can be  solved by adding a level of indirection."
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Copyright ©: Nahrstedt, Angrave, Abdelzaher 7 Program  never  sees physical  address
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Copyright ©: Nahrstedt, Angrave, Abdelzaher 8 Base Register Logical or "Virtual" addresses,   Logical address space , range (0 to max)  Physical addresses, Physical address space range (R+0 to R+max) for base value R.  How: Memory-management unit (MMU) map virtual to physical addresses.  Relocation register   Mapping requires hardware (MMU) with the base register
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Copyright ©: Nahrstedt, Angrave, Abdelzaher 9 Relocation Register Memory Base Register CPU Instruction Address + BA MA MA+BA Physical Address Logical Address
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Copyright ©: Nahrstedt, Angrave, Abdelzaher 10 Question 1 - Protection Problem: How to prevent a malicious process to  write or jump into other user's or OS  partitions Solution: Base bounds registers  
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Copyright ©: Nahrstedt, Angrave, Abdelzaher 11 Base Bounds Registers Memory Bounds Register Base Register CPU Address < + Memory Address MA Logical Address LA Physical Address PA Fault Base Address Limit Address MA+BA Base Address BA
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Copyright ©: Nahrstedt, Angrave, Abdelzaher 12 Allocation Schemes
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Copyright ©: Nahrstedt, Angrave, Abdelzaher 13 Contiguous Allocation and  Variable Partitions:  Bit Maps versus Linked Lists Part of memory with 5 processes, 3 holes tick marks show allocation units shaded regions are free Corresponding bit map
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This note was uploaded on 05/04/2008 for the course CS 241 taught by Professor Systemsprogramming during the Spring '08 term at University of Illinois at Urbana–Champaign.

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28-Memory - Memory Copyright : Nahrstedt, Angrave,...

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