let6-Multipliers

Computer Arithmetic: Algorithms and Hardware Designs

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CSE 246: Computer Arithmetic  Algorithms and Hardware Design Instructor: Prof. Chung-Kuan Cheng Lecture 6 Mulitiplication 
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CSE 246 2 Topics: The Project
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CSE 246 3 Multiplication & Booth recoding 0 1 1 1 1 0 0 0 0 0 0 0 1 1 0 0 0 0 0 0 1 1 0 1 0 1 0 0 1 1 0 (6) (5) (30) x 0 1 1 1 1 0 0 0 1 1 0 1 1 0 0 1 0 0 1 1 1 0 1 1 0 0 0 1 0 0 1 1 1 1 1 1 1 1 0 1 1 0 - - (6) (5) (30) x (A) (B) (A) 6  x  5 (B) 6  x  5 with 5 Booth recoded
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4 Reformulation of multiplication  eliminating sign extension 1 1 1 1 1 1 0 1 2 3 4 5 6 7 8 9 10 6 5 6 4 5 3 4 2 3 1 2 1 1 - - - - - - S S S S S S S S S S S S S 1. si x di gi t mul t i pl i cand wi t h si gn di gi t on t he si xt h bi t 2. an ar bi t r ar y number of S1s can be added i n t he f i r st r ow next t o S1 wi t hout af f ect i ng t he r esul t . 3.
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This note was uploaded on 02/19/2008 for the course CSE 246 taught by Professor Cheng during the Fall '06 term at UCSD.

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let6-Multipliers - CSE 246: Computer Arithmetic Algorithms...

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