Solution Manual for CMOS Digital Integrated Circuits Analysis and Design 4th Edition by Kang

# Solution Manual for CMOS Digital Integrated Circuits Analysis and Design 4th Edition by Kang

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FOR MORE OF THIS COURSE AND ANY OTHER COURSES, TEST BANKS, FINAL EXAMS, AND SOLUTION MANUALS CONTACT US AT [email protected] Exercise Problems 3.1 Consider a MOS system with the following parameters: 18 -3 A 10 2 1.6nm 1.04V N =2.8 10 cm 4 10 C/cm ox GC OX t Q q   a. Determine the threshold voltage V T0 under zero bias at room temperature (T = 300 K). Note that 0 3.97 ox and 0 11.7 si . SOLUTION :  First, calculate the Fermi potentials for the p-type substrate and for the n-type polysilicon gate: 10 18 1.45 10 ( ) ln 0.026V ln 0.49V 2.8 10 i F A n kT substrate q N   The depletion region charge density at V SB = 0 is found as follows: 0 19 18 14 7 2 2 2 ( ) 2 1.6 10 (2.8 10 ) 11.7 8.85 10 2 0.49 9.53 10 C/cm B A Si F Q q N substrate           

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The oxide-interface charge is: 19 10 -2 9 2 1.6 10 C 4 10 cm 6.4 10 C/cm ox ox Q q N The gate oxide capacitance per unit area is calculated using the dielectric constant of silicon dioxide and the oxide thickness t ox . 14 6 2 7 3.97 8.85 10 F/cm 2.2 10 F/cm 1.6 10 cm ox ox ox C t Now, we can combine all components and calculate the threshold voltage. 0 0 2 ( ) 1.04 ( 0.98) ( 0.53) (0.03) 0.44V B ox T GC F ox ox Q Q V substrate C C       b. Determine the type (p-type or n-type) and amount of channel implant (N I /cm 2 ) required to change the threshold voltage to 0.6V SOLUTION :  p-type implanted needed in the amount of: T0 6 13 -2 19 V 0.6 V 0.6 0.44 1.04 1.04 1.04 2.2 10 1.43 10 cm 1.6 10 I ox ox I qN C C N q 3.2 Consider a diff usion area that has the dimensions 0.4 m 0.2 m and the abrupt junction depth is 32 nm . Its n-type impurity doping level is 20 -3 D N =2 10 cm and the surrounding p-type substrate doping level is 20 -3 A N =2 10 cm . Determine the capacitance when the diffusion area is biased at 1.2V and substrate is biased at 0V. In this problem, assume that there is no channel-stop implant. SOLUTION :
0 20 20 0 2 10 2 9 2 14 19 40 9 20 1 ( ) 2 2 10 2 10 ln 0.026ln 1.21 (1.45 10 ) 0.2 0.4 2 0.2 0.032 2 0.4 0.032 1.18 10 [ ] 11.7 8.854 10 1.6 10 4 10 ( ) 1.18 10 2 4 10 si A D j A D A D i j q N N C V A N N V N N kT q n A cm C V 15 1 1.21 1.2 2.18 10 [ ] F 3.3 Describe the relationship between the mask channel length, L M , and the electrical channel length, L. Are they identical? If not, how would you express L in terms of L M and other parameters?

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