problem9 - 3.*** The circuit below is made from two D-type...

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Digital Electronics Tutorial Sheet 9 1.** The signals A and B are applied to the inputs of an SR flip-flop (or Set-Clear FF), a transparent latch and a D-type flip-flop. Sketch the waveforms at W, X, Y and Z. S1 R2 1 2 W X A B A B 1D C1 Y A B 1D C1 Z A B 2.** The hydraulic steering device of a dish antenna for satellite tracking works by adjusting the elevation using a hydraulic ram. Oil can be pumped into the ram to raise the elevation. The hydraulic seals leak pressure very slowly such that additional oil has to be pumped periodically to maintain a constant elevation. Two output signals are provided by the hydraulic system: ABOVE19 and ABOVE20 which equal 1 whenever the elevation of the disk is above 19 and 20 degrees respectively from the horizontal. Design a circuit to keep the elevation of the dish between these two limits. Your circuit should have an output signal PUMP which equals 1 when you want the pump to increase the hydraulic pressure and hence raise the elevation of the dish.
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Unformatted text preview: 3.*** The circuit below is made from two D-type flip-flops with an asynchronous RESET input. Assume that Q0 and Q1 are both low initially and sketch a timing diagram showing the waveforms of CLOCK, Q0 and Q1 for the next six clock pulses. 1D R C1 1D C1 Q0 Q1 CLOCK 4.* Complete the following truth tables for a JK, D and T flip-flop respectively. (A T flip-flop has only one input T and the clock input CLK. When T is ‘0’, the flip-flop is in storage state (i.e. output does not change). When T is ‘1’, the output toggles (i.e. changes from ‘0’ to ‘1’ or from ‘1’ to 0’). J K CL Q+ D CLK Q+ T CLK Q+ 0 0 Ð 0 Ï 0 Ï 0 1 Ð 1 Ï 1 Ï 1 0 Ð 1 1 Ð 5.** Construct a Karnaugh map for each flip-flop expressing the next value of Q in terms of the present value of Q and the inputs. Hence show how you could synthesise a T flip-flop and a JK flip-flop using D flip-flops and appropriate gates....
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This note was uploaded on 04/25/2008 for the course EEE E1.x taught by Professor Cheung during the Fall '07 term at Imperial College.

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problem9 - 3.*** The circuit below is made from two D-type...

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