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2001 Exam Solutions - Digital

# 2001 Exam Solutions - Digital - 1 8 OCT 2004 QUESTION A1...

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Unformatted text preview: 1 8 OCT 2004 QUESTION A1 The figure below shows the intersection of a main highway with a secondary access road. Vehicle-detection sensors are placed along lanes C and D (main road) and lanes A and B (access road). These sensor outputs are LOW (0) when no vehicle is present and HIGH (1) when a vehicle is present. The Intersection treflic light is to be controlled according to the following logic. a) The east-west (E—W) traffic light will be green whenever both lanes 0 and D are occupied. l .__ b) The E-W light will be green whenever either C or D is occupied but lanes A and B are not both occupied. c) The north—south (N-S) light will be green whenever both lanes A and B are occupied but 0 and D are not both occupied. d) The N—S light will also be green when either A or B is occupied while C and D are both vacant. e) The E-W light will be green when no vehicles are present. Using the sensor outputs A, B. C. and D as inputs, design a logic circuit to control the traffic light. There should be two outputs, N-S and E-W. which go HIGH when the corresponding light is to be green. Simplify the circuit as much as possible and show all steps. H w—Nke PW" Ml up C~ “kW/L '1 8 OCT 2004 + ﬂ65(f+c> +A/SED (xixq) ﬁg!) + ﬂgED 8+5)+ (965.!) :XM) 4'7 7'— A565 A?5+ ﬁsiﬁ +ﬂ5f+ﬂeib 435' + Age“ .4) '7) _ @612 1; {489-1) 9/: . n ‘ ? I 180CT 200k ”1809212001. Draitlv a circuit diagram for the synchronous parallel transfer of data irom one 3-bit register to another using JK iiip- lope. P i _ - /< 5 (5 marks) Trams-Fez. I QUESTION A3 A recirculating shift register (shown below) is a shift register that keeps the binary information circulating through the register as clock pulses are applied. The shift register oi figure 11 can be made into a circulating register by connecting X0 to the DATA iN line. No external inputs are used. Assume that this circulating register starts out with 1011 stored in it (that is. X, = 1. X2 = 0. X1 = 1. and X0 = 1). List the sequence of states that the register FFs go through as eight shift pulses are applied. Iﬂ'i' pix/5+6 3f Hm / Word JAM Lira/M 2 remitted” Alt/rag _. 3 9’ f (>\ ~O—h-nx ...
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