ch11 - STANDARD SEQUENTIAL MODULES REGISTERS SHIFT...

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1 STANDARD SEQUENTIAL MODULES REGISTERS SHIFT REGISTERS SYNCHRONOUS COUNTERS FOR EACH MODULE WE SHOW: SPECIFICATION IMPLEMENTATION WITH FFs AND GATES BASIC USES HOW TO IMPLEMENT LARGER MODULES Introduction to Digital Systems 11 – Standard Sequential Modules
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2 REGISTERS CLK CLR (Clear) LD (Load) n n Data input x Data output z REGISTER Control inputs Figure 11.1: n -BIT REGISTER MODULE Introduction to Digital Systems 11 – Standard Sequential Modules
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3 REGISTER: HIGH-LEVEL SPECIFICATION INPUTS: x = ( x n - 1 , . . . , x 0 ) , x i ∈ { 0 , 1 } LD, CLR ∈ { 0 , 1 } OUTPUTS: z = ( z n - 1 , . . . , z 0 ) , z i ∈ { 0 , 1 } STATE: s = ( s n - 1 , . . . , s 0 ) , s i ∈ { 0 , 1 } FUNCTION: STATE TRANSITION AND OUTPUT FUNCTIONS s ( t + 1) = x ( t ) if LD ( t ) = 1 and CLR ( t ) = 0 s ( t ) if LD ( t ) = 0 and CLR ( t ) = 0 (0 . . . 0) if CLR ( t ) = 1 z ( t ) = s ( t ) Introduction to Digital Systems 11 – Standard Sequential Modules
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4 IMPLEMENTATION OF 4-BIT REGISTER z 3 x 3 z 2 x 2 z 1 x 1 z 0 x 0 CLR CLK LD D Q Q’ D Q Q’ D Q Q’ D Q Q’ 0 1 MUX 0 1 MUX 0 1 MUX 0 1 MUX Figure 11.2: IMPLEMENTATION OF 4-BIT REGISTER. Introduction to Digital Systems 11 – Standard Sequential Modules
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5 TIME-BEHAVIOR OF REGISTER Clock CLK Input Load LD Output t p z x propagation delay setup time t su Figure 11.3: TIME-BEHAVIOR OF REGISTER. Introduction to Digital Systems 11 – Standard Sequential Modules
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6 USES OF REGISTERS: Example 11.1 INPUT: x ∈ { 0 , 1 } OUTPUT: ( z 1 , z 0 ) , z i ∈ { 0 , 1 } STATE: ( s 1 , s 0 ) , s i ∈ { 0 , 1 } INITIAL STATE: ( s 1 , s 0 ) = (0 , 0) FUNCTION: STATE TRANSITION AND OUTPUT FUNCTIONS: PS Input x = 0 x = 1 00 00 01 01 01 11 11 11 10 10 10 00 NS z ( t ) = s ( t ) Introduction to Digital Systems 11 – Standard Sequential Modules
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7 CANONICAL IMPLEMENTATION Y 1 = y 1 x 0 y 0 x Y 0 = y 0 x 0 y 0 1 x y’ 1 y 1 x’ x CLK y 1 x’ y 0 x y 0 x’ x Y 1 Y 0 y 1 y 0 (a) D flip-flops y’ 1 Figure 11.4: NETWORKS FOR Example 11.1: a) NETWORK WITH STATE CELLS; Introduction to Digital Systems 11 – Standard Sequential Modules
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8 IMPLEMENTATION WITH REGISTER Y 1 = y 0 Y 0 = y 0 1 LD = x (b) CLK CLR LD Y 1 Y 0 y 1 y 0 x 0 Register Figure 11.4: NETWORKS for Example 11.1: b) NETWORK WITH STANDARD REGISTER MODULE Introduction to Digital Systems 11 – Standard Sequential Modules
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9 SHIFT REGISTERS CLK CTRL n n SHIFT REGISTER Serial data input (left shift) Serial data input (right shift) x l x r 2 Parallel data input x z Parallel data output Figure 11.5: SHIFT REGISTER Introduction to Digital Systems 11 – Standard Sequential Modules
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10 PARALLEL-IN/PARALLEL-OUT BIDIRECTIONAL SHIFT REGISTER CLK CTRL x r 2 x l n-1 x n-1 z n-1 n-2 x n-2 z n-2 0 x 0 z 0 Figure 11.6: PARALLEL-IN/PARALLEL-OUT BIDIRECTIONAL SHIFT REGISTER Introduction to Digital Systems 11 – Standard Sequential Modules
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11 HIGH-LEVEL SPECIFICATION INPUTS: x = ( x n - 1 , . . . , x 0 ) , x i ∈ { 0 , 1 } x l , x r ∈ { 0 , 1 } CTRL ∈ { LOAD, LEFT, RIGHT, NONE } STATE: s = ( s n - 1 , . . . , s o ) , s i ∈ { 0 , 1 } OUTPUT: z = ( z n - 1 , . . . , z 0 ) , z i ∈ { 0 , 1 } FUNCTIONS: STATE TRANSITION AND OUTPUT FUNCTIONS: s ( t + 1) = s ( t ) if CTRL = NONE x ( t ) if CTRL = LOAD ( s n - 2 , . . . , s 0 , x l ) if CTRL = LEFT ( x r , s n - 1 , . . . , s 1 ) if CTRL = RIGHT z = s Introduction to Digital Systems
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