Lecture7 - 1/8 ENSC150 Lecture 7 Agenda Three steps of...

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ENSC150 Lecture 7 Agenda Three steps of Design Procedure Optimization of 4-Variable Functions Using K-Map “Don’t Care” Condition 1/8 Lecture 7 Atousa Hajshirmohammadi, SFU
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Introduction Recall the Design procedure: Specification: This is usually given to you. Formulation Optimization Technology Mapping Verification Today we concentrate on the first 3 steps to design some logic systems (circuits) For now we only deal with “combinational logic” as opposed to “sequential”. In combinational logic the outputs at any time depend on the inputs at that time. In sequential logic we have memory elements also, i.e., outputs may depend on inputs at the present time as well as previous times. 2/8 Lecture 7 Atousa Hajshirmohammadi, SFU
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Design of BCD-to-Excess-3 Specification: This is a logic circuit that takes a BCD code for a decimal digit (recall BCD? Lecture 1) and converts it to an “Excess 3” code, i.e., the binary representation of that digit plus 3. Example 1:
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Lecture7 - 1/8 ENSC150 Lecture 7 Agenda Three steps of...

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