Lecture8 - 1/9 ENSC150 Lecture 8 Agenda Technology Mapping...

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ENSC150 Lecture 8 Agenda Technology Mapping Cell Library 1/9 Lecture 8 Atousa Hajshirmohammadi, SFU
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Technology Mapping Full custom design: Design the entire circuit to the smallest detail. Standard cell design: Use pre-designed gates or combination of gates (cell) and connect them to obtain your integrated circuit (IC). Gate array: Use pre-fabricated “gate arrays”, which have up to millions of gates. Your design determines the connection between the gates to achieve the function of the specified circuit. 2/9 Lecture 8 Atousa Hajshirmohammadi, SFU
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How is a “Cell” specified? Schematic or logic diagram Area it occupies Input loading Delay from input to output What is a library? A collection of cells What is technology mapping? You design and optimize the circuit using AND, OR, and NOT gates. Then you convert it to a circuit that uses the cells that are available in the library. 3/9
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Lecture8 - 1/9 ENSC150 Lecture 8 Agenda Technology Mapping...

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