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Lecture15

# Lecture15 - R High(1 Low(0 Mid High(1 Low(0 Mid High(1...

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ENSC150 Lecture 15 Agenda Latches SR-Latch ¯ S ¯ R -Latch Latch with Control D-Latch 1/6 Lecture 15 Atousa Hajshirmohammadi, SFU

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SR-Latch Latches are another type of digital storage device. Circuit of an SR-Latch: Q S(Set) R(Reset) ¯ Q Set state: S=1, R=0 Q S(Set) R(Reset) ¯ Q Now what happens if S is changed to “0”? 2/6 Lecture 15 Atousa Hajshirmohammadi, SFU
SR-Latch (Cont.) Reset state: S=0, R=1 Q S(Set) R(Reset) ¯ Q Now what happens if R is changed to “0”? Undeﬁned State: S=1, R=1 Q S(Set) R(Reset) ¯ Q Table: 3/6 Lecture 15 Atousa Hajshirmohammadi, SFU

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Simulation Let’s simulate an SR-latch with the inputs given as below:

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Unformatted text preview: R High(1) Low(0) Mid High(1) Low(0) Mid High(1) Low(0) Mid High(1) Low(0) Mid S 4/6 Lecture 15 Atousa Hajshirmohammadi, SFU Latch w/ Control • ¯ S ¯ R-Latch: Q ¯ Q • We add an additional input and appropriate circuit to ¯ S ¯ R-latch to be able to control when the state of the latch can be changed: Q ¯ Q 5/6 Lecture 15 Atousa Hajshirmohammadi, SFU D-Latch A type of latch that ensures that the“undeﬁned” state of the latch never happens. 6/6 Lecture 15 Atousa Hajshirmohammadi, SFU...
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Lecture15 - R High(1 Low(0 Mid High(1 Low(0 Mid High(1...

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