Lecture10_Single_Diff_OTA_2up

Lecture10_Single_Diff_OTA_2up - EECS240 Spring 2008 Lecture...

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EECS240 – Spring 2008 Lecture 10: Single-Ended and Differential OTAs Elad Alon Dept. of EECS EECS240 Lecture 10 2 Simplest Single-Ended OTA
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EECS240 Lecture 10 3 DC Input/Output, Gain EECS240 Lecture 10 4 Gain, Output Range out vo in dV a dV = _ _ out out o vo in in o VV A = Small Signal: Large Signal:
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EECS240 Lecture 10 5 Frequency Response EECS240 Lecture 10 6 Noise () 43 42 1 f n m B m m m B m m m B ieq V V g T k g g g T k g g g T k f v + = + = + = * 2 * 1 1 1 2 1 2 1 2 1 2 1 1 4 1 1 4 1 4 γ NMOS only NMOS and PMOS
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EECS240 Lecture 10 7 Differential Input? Why use a differential input? Diff. version has extra device(s) – more power, noise, etc. Real reason is systematic offset All voltages are relative Inherent asymmetry to get single-ended V out “common-mode” sensitivity V in V out EECS240 Lecture 10 8 Fully Differential Circuits Fully differential circuits: complete symmetry V id = V i+ -V i- V ic = (V i+ +V i- )/2 V od = V o+ -V o- V oc = (V o+ +V o- )/2 Still need to be careful with common mode
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This note was uploaded on 05/23/2008 for the course EECS 240 taught by Professor Eladalon during the Spring '08 term at University of Calgary.

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Lecture10_Single_Diff_OTA_2up - EECS240 Spring 2008 Lecture...

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