hw5solv2 - maps to minimize the number of literals in the...

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1 ECE 2030F Homework 5 Solution (Total 50 points) 1. Draw a transistor-level schematic for a dynamic CMOS latch with a reset. (15 points) 2. Draw a state transition graph for a 5-state counter with a reset to state 0. (15 points) The reset is the input to the state machine. The counter output equals the present state with encoding S0 = 000, S1 = 001, S2 = 010, S3 = 011, and S4 = 100. When reset is 0, state changes go from S0, S1, S2, S3, S4 and back to S0; when reset is 1, any state changes back to state 0. The state transition graph is:
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2 3. For this state machine, first apply the encoding s0=00, s1=01, s2=10, then use Karnaugh
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Unformatted text preview: maps to minimize the number of literals in the logic implementation of the machine. (20 points) Input Present Next Output 0 S0 S0 0 1 S0 S2 0 0 S1 S2 1 1 S1 S1 0 0 S2 S0 0 1 S2 S1 1 After the encoding is applied: Input X Present AB Next D A D B Output Y 0 0 0 (S0) 0 0 (S0) 0 1 0 0 (S0) 1 0 (S2) 0 0 0 1 (S1) 1 0 (S2) 1 1 0 1 (S1) 0 1 (S1) 0 0 1 0 (S2) 0 0 (S0) 0 1 1 0 (S2) 0 1 (S1) 1 Use K-maps with don't care conditions (AB = 11) to minimize the logic: X B AX Y B)X (A BX AX D X B X B A D B A + = + = + = + =...
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This note was uploaded on 06/17/2008 for the course ECE 2030 taught by Professor Wolf during the Fall '07 term at Georgia Tech.

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hw5solv2 - maps to minimize the number of literals in the...

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