ee102l_mt2_Sp2004_soln

ee102l_mt2_Sp2004_soln - cc | I]Z_midtcrrr.1_5-i:1'r:m...

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Unformatted text preview: cc | I]Z__midtcrrr.1__5-i:1-'r.:m Spring EBB-t EElflET. Instructor: Gandhi Puwada Midterm Exam II {313%} Date: April Sit]= Eflflat, Friday [lpen—Book Open-Notes Exam Time: 4:65 -é:w}1 in THT-I'iill Name: Totaipoints: [30 RH ISM“ I { i9 +é+3+2U+lfiifi§oiutfl 55 min. R3113,- 2—digit BED to T-bit Binary number conversion: in one of yottr labs, "Expt. #1 i Designing an User interface“, you converted a 'F—bit binary number to a 2—digit BED number by subtracting TEN repetitively From the binary number and keeping track oi‘the number UF.\'uc'c'e‘.s.gfiif summations. Here you are doing the reverse conversion. Here you want to convert a two digit BCD (binary—coded decimal) number "T D" {TsuTmeTm ogo4oyo1} into T—bit binary number (xfixgxitxaxlxlxflt The ECU digit {'l'gu'l'm'l'm‘l'm] stands for TEN’s digit. The ECU digt "D" [030:0201} stands for Dhl'Eis dig-it. fitgemhm: Add this {toting} to the "D;digit “s “b "T" times using a binary adder to get the resuh——i — -—_____fi ~Exampleg31m=flflflflflfll+1Dlflrlfllfl-lfllU/r x = gun. hfig—i K“ " ‘I _— -—“ + 1o1o Three times feet": __________ _ _ iffi feet"! can lflll .-.. “mg fer __ + 101s -te_:e_—_—_._:____se r. ......... -— “tr—~______—_:_:__— f“: U D l D 1 Di ____———— -—|- + 1910 x__ __ _ _ eel 1111f,- 1.1 Complete the state diagram #1. Uut ot'rhe remaining two state diagrams (#2 and #3}, complete one oi'the two and criticize the other. Note: T could be any number from t] to 9. So it could be a zero. L'se T_E-Q_t]_or_1 or T_EQ_IJ or T_F.Q_l {or their complements T_EQ_fl_or_l or T_EQ_I} or T_EQ_] } to complete the state transition conditions. Please refer to the Data Pam diagram in rhe later pan of this question where these signals are generated. Note: T_EQ_[I_or_l stands For "T is equal to t} or 1. "Tin" may be invalid until START is true. 1it’aiid "Tin" is collected into "T" at the end of the clock when START is true. 51.9.5: You wish to criticize the state diagram '7? 9H {#2 s3). TULITCTiliClSIHIfiHSrM $1, van-A Eng . mg, 1-1313 ggimkw SEQEE gem fl {E‘s-“r .mwt‘efi; re ‘* tr {:3 filament "’ TMMQM I. - . _JLL‘ — _— ._— . — I, [n . t j E Lake EEtezt Midterm: :s_..1ing_II}D-1 . 11. ©Eflwfightmm Gandmpuwada {535*} -' START ._‘1:=._E.E...-D..-_M: " _ fibre the 'lfe‘q'.’ — ' . G = f :— IfllT-lal __ "I ' , "x. H :~ xq=rmaom BERT 11f Wee- than : '1‘ := Tim; 9; «z: x + 1014;} - > E E f'h 3': V This. 15. a .7_-_—'|'-I-...\I 5 pt?! 8w Tia-I RESET N am; x0 "55-; _. G Initial _ T $311+? ]; X {2 afld II Xi=X+ifl1flfi GRIT: c: 26' THIS UNTHDUG HTFUL. E SOLUTION —/ G Gather T i: T — 1; X§=X+IJUID¥ j COMPLETE TIIIS OR #SL 3.“ COMPLETE TIIIS 0R #2- 4."2'§.-':JI-4 EEIDZL Midtcrm #2 a Spring EIH'J-‘r 1 1‘1 (9 Cnpyrigmzm Gandhi meuda eelfi2_mid'.efm 15:3}: 1.2 x_:ttt':t_s x_s—tt':t_sa Wt .. _,\ {pf tr" 1.3 ill-"3.9504 The Data Path Unit given below is already complete Gilt} omLtmttlmm1 m Host _ D C0111}: Lttet [run —I _ No-Cmtnet Deere- mentet' "'ttn'l'atuTtnTttt :2 Ex 72+ EX The X—reuister shall he an edge—settsitit'e register. it ea11 not he a level—sensitive Iateh. False The T-recister shall he an edge—sensitive register. It can not he a level-sensitise lateh. False in the ease of the T_eounter, 'l'_Dee is _ ant—ital. — l'ttaetive—high t active—low}; T__l_oad is __ 1. vi. - h “ (active—high aetire—Iott'}. The design of the eounter is sueh that: when I, __ {'1 _Dee T_Load} is sense, it does not matter whether T .. D 1:: {T Dee T_Load} is aetitte or not. The X_register and the T_register in the data path, the DFFFs ill the one—hot implementation in a later part in this question and the mieroprogram eottnter in a later part in this quesrlon are all shown as triggered on positive-edge of the clock CLK. Select either statement A or statement B . All DATA registers {X_registers and T_register in this problem} and State Memoryi registerts} (one—hot flip—flops Q1, Q5, QB. or the mieroprogram eottnter A 1 Ag here} shall all he triggered on the same edge ofthe eloelt {ELK}. This provides a complete eloelt period {nearly a eloek period eonsidering the setup time; flip—flop propagation delay, ete.) For the proeessing elements in the DPL” (here, the adder performing X - hill {11 and the deerementer perfomting T -lj|. EElfiEL Midterm #2 - Spring Elm-1. 3 -' 1'1- © Copyright EDD-1 Gandhi Pun-ads er. [Ell _Tnitilemfl_fipfli..]}r: l3} All DATA registers shall he on one common eloek edge irrespective of the control registerlfs}. 1.4 Koa' implement the state diagram #1 using one-hot method below. m Also draw the complete OF L {Output function Logic} to generate outputs X___MUX__S 1+ ' (-2.133? ' X_hl'[:X__SID~ T_[)ee= and T_Load. signals. Fill the table relating the states and the T condition to the X_M'UX_Sl and X_MUX_SD first. This table helps in generating these X_MUX select signals. - :CL' (RSI. — SM + OFT.) r KTST. \ | You do not have to complete this N SL f" Fill-[n an appropriate 'I 5 L ctmd'ilit'm associated with T /—\ f' ' \ to heme, ®Q%T—Dec GLOBE! MT" Qp _ [lone T_Load I"? _.T - - ' 7'; .. I a J, _.' . .- 4. “9' J4- 2- Spi'lna ® Gal]th Pu‘Tada ccl l]2__.—..'.L!'.e:.3 _S_:r:-—'. .'::'. 1.x“ '- 1.5 Complete the nticroprograrnrned control unit below to implement state [email protected]@tchieh (‘6’ “‘x over you selected to complete). Control unit block diagram; 3 Jam M map: _ Mar/J .-"_:i__\- a} L: l.— t KI MI U Tl : e E E ” g e E: E'I E filo '5 :I 4 E in E] «c K 5 it H P :l Th'ltc-ropro grammed control Ltnit Complete the inputs to the condition select mm; and complete the microcode below: I. Dran'inverterta ' as needed. Nunrl;5 {Er aranr .:-p ' ' 1'“ e__%::::::::::::::::— - .... 1 I! Draw invertedah 't as needed. 2' ./§t:;:e the Size i. of the Control Memory: GEE; «11x31 ; k— 1.6 The above micro—programmed control unit is a M. @985 {Meal}; Moore} machine. -_ - :6)?! It is __ _m'[' floan t. Mf— {equally convenient i' not quite convenient} W to use the ulZ'rog._CU method to implement the state diagram #1 because It; i Canon-Mm? 1 Unei- a: 2L toe—S kggigegg’ itilrfi. *' TREE-.- fi't 5' - r: 9- foamin- Gil-3,: E. ConTec‘l We; 22' lnTereanl‘ EL". tin-Etna {farc- iLLQL? 9:721; CM, sq. eel'fll :ritlterrn: SEMI: 1.7 Complete the Following wavefems fer eenw'ertjng Tin Din = TgfljanflinTm-n’rmin ngfl4tn03m01in é'épm -. = 111111 1111111: 31 decimal m a 1-bit binary number X = Xfixfixgtfigxtxfium 1111= :4 —. 23 + 23 —' 11+ 1” = Ifi*3+4+2+1 = 31 decimal. {A} fer the one-th central unit implementatien {State diagram #1), and {B} fer the mierepregmmmed eentrel 111111 implementatinn en previeue page. The datapath is (me and the same for both control 1111plementatien5_ _ 1:01 Tm Om = 3 1 decimal, batted (in your anal 1:515, 1E1? x._ (a) the one—hut state machine would spend in the QG state 3 {2 I 3 .1" 4} clocks; "jg—fiend (h) the mierepmgrammed centre] unit would Spend 3. [2 a“ 3 1" 4) clocks in the step r P b . . . - r W eaeemg eddtng TElNe 111 3%.. : —- N m ~— u- -: ..-- 3? EN 2 : E Tel "3' "e: e e e e 73‘ E -1-= e‘ H :16' -= -.4 -.== -1= 4-" 44' -'¢' -‘ ;=‘ .5 £5. E :3 :5 15 :5 .3 .3 E i .l '—r In G J :r 'J Cl L.- '_F Ll —- vZeffl r1 I 115 for the flee-hut centre! 11ni1 implementation i EE’avg forms for:_fi1e mgrefimgrammefl "11111111; _l__u11iti1nglem§_1_1_tatie_11_ T: Tau-rquTzeTItl 429-124 " ' 9;) _ ' '1 .- 7 _ ' Him" M‘mm' ' Smngjm ’5' 1- ©Cep1r'nght 211114 Ganth Punada eel |Jl_1'nidt::tn2_Sp-'J-'r.if—.. 2 [ n2 _ paints) I5 min. Counter design and timing cheek: Tit-n different student designs fer a 4—bit eeunter with eeunt enahle (CE) are given below. Regmer -- t '. '| CEN— Fe-— _x in Q|-\ES-_Bgi 1 —-~_- E-j—— —\i- — L3- : —3'- E'G— u 7' :2: ' r x. ‘ ' B: I.F?'_._'§*.E"' ____fi \___ J raw; '— -"'_ T _"\. .- . : _ I I I RM- -_\--|'l:_-\'UT._-: 11:31.. / IX“ -1\-I:IC|:II'I.u'O] UBLtl/s' hi1]...I Eaeh student was given a 4-bit wide muse a LLhit adder= and a 4—bit register to build the eaunter. The twin students were given the Fallen-mg timing specs: CLOCK: tflk = 10 ns (IUD Mliz elnek) ADDER: t‘gddcr = 1 ns (min), 7’ ns {max} MILK: tmm = [3.4 ns (min), [1.9 ns {max} Flip-Flaps: (for the feur PR; in the ennnter er the three FFs in the state memory in the CU): II N; = (15 ns (min), 1 ns (mas); t5” = 0.6 ns {min}; th 0.4 ns {min} The delay in updating GEN by the central unit after the clock is: 1.2 ns (min) and it) ns {max}. , 1 . _. _ - r’,—" , " "x f CULCDM‘ '-'='=” tffpd * IOFL _ x The State maehlne controlling t'ris \'-. nsEtnaxj+1nsfmaxj EELL‘ltEI produces, GEN with some delav —.. 1 1 ' {m eenaequene :e the elock—ecge. CE}; C: a clock-edge; the sleaze machine .—h changes state and then canseq—aezzl'r '_1:_':-— daaes CEN through CIF‘L (output. fantasies: leg-l e?- . /‘ \__—_ J,- hir. Bruin is boasting that his design uses leSs hardware and hence cheaper and fesi‘gr. What do you say? The fellnwing drawings of eritieai path are provided tn aid in your analysis. Pang: “h . [ZEN ' -_-_ L. ' \t___.. _ _ ' if “5: __ g “J GEN “,- - "x r”— "" -= CU ’- eu “t a _ \htfltztélllailia,» 'kujtauamitImnf/J "'- _ IKE—“I BIT. BIN-HE’S Design {/5 \ _ [1“ r. Tr-Eianrs Design 4.-"2‘:}.-"|Clr-i- E131 02L Midten‘n #2 - Sprung mm a 12 © Copyright 20114 Gandhi Puvvada echQ_rn.ieterm2_S;fl-t.fin 2.] Delay in preducing CEN will delay the addition nperntieii by the adder in the case ef @ I3. nUiM's but his”! {Ernie’s design! Trejan's design a“ heth designs I nene ef the designs). 2.: Timing analysis: Let us perfenn lengcst path analysis te see if the design can meet the EGG lysz frequency requirement. Leek at the paths and carefully arrive at the tmmbfimfl} fer each ef the __ _~_Hf\eur padus and eernplete the ealeuiatiens heleu'. LIL-1E??- ruin‘s design Path_l Setup tirne Margie = it”; {flyflfinaxj ' icombljmax} ' tsetupenin} = lIilI ns - 1 ns - tmmmmfl] — {1.6 ns = 8.4 ns — tcomhmax} S‘ii— tndciirtnmj: S'Q’T'c’: E'fi‘“ Tic) viaiafi'efi Brain‘s design Path_2 Setup time Margin = tclk —tCEN Emgmimmm} — tmmmmax} — tsemmm-mj = 1i] ns - 311s - tmmmmfl] - {16 ns = 15.4 ns - twmbtmfl} = 6.6% '- t‘flhddgr r} :- t ' Fen l . , . . . v t 0 Le. x . Trejan s design Path_l Setup time Margin = ta,L —tfipmmm — twmmmw — tsmfimin} =lflus-lns-t -{l.6ns=8.4ns-t cemhfmax} cemhfinaxj g' 'J-i " CtAddcr (Erma-=3 1— m” @039 -; gag _ (7,0 +05?) :- 0-5 mg no uieleEen ijafiifi dESigfl Path} SETUP film? Margin = elk 'tCEIfiLgenernlienEmax} ' tcernblirnax} ' tsemmmin] = 11] ns — 3ns — tmmmmfl} — 116 ns = I114 ns — tcombfmax] 6' 'r-Ens " than {than} 2 6. it _ DI? : 55"‘3 1’10 vistafien 2.2.1 Based en the aheye ealeulatiens, hew de the twe designs eeinpare'l' a stand was '4 - as, saw u: w CEN L Mung !“ , Meier: ml M. Alluw Potential spa-Jen; ‘ 2.3 Held time check fer path is dene using the cquatien: Hifld fimfi Margin = trrPetmjn} + cumstmini - tlinldflnin} J/ Since tgimmin} of [L5 ns is {w 'E" (higher i" iewcr} than thmdizmjn] ef 0.4 us, it is 1K._J WEI M17 {necessary i“ net necessary) te perferrn detailed held rirne cheek calculatiens. 4.-'29.e4 amen. Midterm e2 . Spring less 5; 12 © Copyright m” Gandhi Pumda rtifl?_:id;errn1_i‘lfii|-'r.frn 3 { lt1+t54r3 _-: 3 3 points} 25min. State Diagram Design (Observing ME and AT rules): 3.1 Reproduced on the side is the solution to one ofyour homework problems where 4 votes. are inspected serially. Complete the "not-SEI- “fn 2 15'". o ritual” deai ofthe w gate diagram fllow. This produces always CORRECT (RIGHT) conclusiona. However the inference sometimes takes an . ETA H | ‘ extra clock compared meg/62K R to the homework 1 egg . ? I COLE—l" IL- SDlution. Q2”? new Inference "WON" Keri—- tekes grin. (one;f :; iii: no} extra clock. fl" Lofcretioe "DRAW" xiii,” takes {2% (one .-’ _,,_,_,‘ no) extra clock. _——.:--t= CGL'1N"I'<= —i H (LOL'NT d: L"CGI-_-‘"T“t=fl' ('fll'Ni'I'+] ' - -- ~ : of transition Do not change the \lotci N0 state-trefiiriori -' _ conditions already Eifi'en by me. "-‘~-'n'te 33m?“ me cocditiom: for the £13133 BMW“ reitiainjng :1 state transition arrows. NOT—S U—flPTll‘rlAL state diagram 4929.304 EEIDZL Midterm #2 - Spring earn 9 ' 11 @ Copyright 1004 Gandhi Put-Talia 3e102__rrLititet:'_"_S_:H}—I.1h1 3:3 This is similar to the homework question-solution reproduced on the previous page _ We are ref-“F £5 inspecting 4 1.iotes again, but 2 votes at a time (in two iterations} using a 2—bit wide 2—to—l mm: as @ shown. We are NOT using a eounter to seleet rates here. We are using a single—hit toggie flip—flop reset initially to seleet the firsr pair of 1rotes {VD and 1fl) as VA and VB . Then the flip-flop is toggled to select the seeond if and last) pair {V2 and V3} for inspeetion . .x' ‘“ RESET Complete the T—state state diagratn by completing all missing state transition conditions { | G in total}. Use VA, VB, and S as needed in forming the nine state transition eonditions. I = Initial: C = Counting, C133 = Continue to inspeot the nemaining {last} pair ofvotes with 1 ND vote previously seen: C235 = lSontinue to inspeet the remaining {lain} pair of votes with 1'. ND votes priwiotislj.r seen= “‘03: = 3 {or more} YES votes, DELi‘W = 2 YES and 2 SD votes, LUST = 3 [or more) NU votes ,2 — __— Figure for xx. ,r/fliigure for - . . . H1. n U E I n I II'. H giggi 5 "£538 ____ —A 3 . HE Questton 3.3 I i Question 3.4 as: ;___i_ r __-_s s - __ | 1’ 1 “ n / I: \T. E; x fillet ““ ' -'_ .5 se—_a .i—Smmhi 54:3 Q“ ’i j 'I Egg-Tan" “El—Ext; .“HH — £< __ __FF_.‘__._ p i. — :11UET-E was \ a a ti - bx as 'I ,Ja in; i it a: 3r 7 '9 if I State-"x- J” E __ a...) “5* - ' 1 i' - OJ: 1-,; ! RR- .4 It" a state has only one state transition arrow dd. var Kara-“NE [converging on to it i diverging awayr from it.' either converging or diverging then that state transition REE?) arrow must he unconditional: as otherwise. we will be violating the g . i rut; _ [JLE (h-‘lutualljrP Exclusive} rule H Al [All Inclusive} rule i both ME and AI rules}. 4.": Midtenn #2 - Spring © Gandhi Pal-“ids eel|3|2_tttidtertt|2_5;.lifi. fr: 4 1: Spits): g :. [633135 points} 10 min. + 5st”- :1 lGlitches in combinational logic: You 1were taught STATTCJ HAZARDS and STATIC_U HAZARDS and you also experimented producing these hazards in simulation. f—s—NHK r/f;—“\—_ _‘\ est: ; J -- is; I at; “m TEN: a I ';-. E _-'_.-"_ #1. t.—\ =- I____|__L| J_ i l ' I E _ - ,n: I II "I -' _ I -PlL-'- M‘- \H_ s/ \g .F/ \c_"_/' 7:; t A n _/ IT: *1 . i nn; lkul x“ " R? *l _ H T I 7Lang—' l1 mil—fl...) : yrs: | -—:c—sn s fist—m git—is ..-'K~._':PHIa'- _ 7:: J; ft“ - H" 5 :"'--“-'_H-; as 5'2“? s 'F -t- M I i - _,-' '_ i i.-— ‘s. .—,/ x.— / Muses it'l and #2 above are don‘t your lab. Mules #3 and #4 are modified versions of the routes '=.l and #2. Delay balancing buffers are added but unfortunately the buffers have a delay of fins where as Lhe inverters have a delay-r of Bus. lComplete the following four statements. Hint: A git!ch is produced when one ofriro nro "product" gates, which is cunemdypron’ttcing the product. comes to produce the “product” before the other '1orodnct"gotc starts producing its 'joron'ncr". Mu}; .=.'l produces a 3T4“ C - L _ {STATICJ .t' S’l‘ATlC ll} hazard by producing a n _ “3113 (Ins J Bus f 411s t Tris} wide 1 fig. 395':% (low—going x" high-going) pulse ~ 33?) consequent to the select line 3 changing M of {from 1 to II] .-’ from II} to l) ts'hilebotfilfl and 11 are both held at 1, . (l .-’ U}. T‘s-lax #2 produces a Smfl g : _ 523 {STATIC l t STA'l'lC_tl] hazard by producing s (gilt; e: n5 __ {lns a“ 3ns f 4115 I! Tns} wide (low—going I.-' high-going} pulse \ this! consequent to the select line 8 changing _ ,Dgrflm ? [E j b {from 1 to [J from t] to l} ts'hile both It] and ll are both held at _ g .. t l JI. him: :33 produces a STAT {Q -‘ l {STATIQ l f STATICJCII} hazard by producing a [FL—2.: l “a (lns t 3ns t 4ns t Tns) wide _5 — * (low—going high-gong pulse consequent to the select line 5 changing _ __ (Front 1 to ti from d to l} whileW‘t‘lfl and II are both held at :5 , _ {l . s-tus- :4 produces a STAT [Cog (STATIC 1 srartcp} hazard by producing a @ [1% (lustr Ens Mos t Tns} wide _ 153% a fifligfi {low—goingt'high—going} pulse 313) consequent to the select line 8 changing .éflm d E a (12mm 1 m D [mm U m 1) whilejzgit It] and Il are both held at . (1'0). ttftL» ' © Pur‘..ada ee lfll_mititer.tfl_5 jJ'J-i it‘- 5 t 23 points) is min. 5.1 Schematic #1 is telling us that if system-:1 if: {is isn't] ready Di" fand.‘ or} 5 THE-1W A (“FT—“3 system—H {A (is .-’ isn’t) ready, then yRDY w system—C should be told to “mi? {go ahead wait}. System—B H.121 .3 .—-"“>“* 5.2 Schematic #2 is telling us that if system — .Jt Lg [is t'isn’t) ready Egg ( and. or) @ system-B {E {is it isn’t) ready, then P system—C should be told to _ My ahead wait}. 5.3 logically, schematic #1 is @ i; &‘ Riga-fl {essentially the same as quite different From) schematic £72. 5.4 _'—‘t Read Only Memory (ROM) is a Grits {combinational . sequential] logic because the data out ut is _g_:_i~nyPLpI T _ @ Cg“! ufl flat? 15$, il'kPui— {completely dependent on the current address input only dependent not only on tho ourrent address input but also on the past address ianits}. 5.5 A RUM with eight {8) address input pins and four [4) data output pinsiscalleda 9-56XLL_ _ f/"'_"\. {SitsEfioxlot’fixlm'flfiox43x23X4. 8a.? :Dli'tET71'tal'l'lEiy..) Art 3331 A} 5": Asia-j"- kEL/i ROM as it has 25$ ts 4 -' s '2. 256 is other, ROM namely _l locations, each with it {'8 f 4 i" 3 t 2 a“ 25s -' lo other , namely } hits per location. 5.6 in a microprogram control unit method: /' There are 3 states. We have used the step-state numbers I], l. 2, 4: 5, and 7". Number the RESET If : I' remaining two states as 3 and t5. 5 ' ~ ' I' l I — 4 ' : r .u Z Z. “3 Do you have two choices to number the two states 5 0 j i — [ 2 _ a: E 1 Pt " 1with 3 and Ft or just one choicc'? i {l-"ijl. KE_/He ' 137‘s”: I ' x’fi fa — ‘tfsifi 3 t if” Size of the microptogtain counter needed: a: -|:iit. \s__J/HL/r'n\_/L-/ i \H___,,/ I _ _ _ : 6 __ t {a List the state transitions which can not be '-\ \sd/ xy' 3 F32, t aehict-‘ed by inerementatioii of the uPC: D to 5: 5—' Ba... —'R m ates; eras anaesthesia 3;..- _ 3 E fat. Draw a suitable simd condition select anus and label Pro uPC F _ . . , __ q t" ' its inputs. Womed "—" It Load a 1 @ % -——- In.- |__ L ]I_ ' @ Complete thEHEg-rgtaetion to the “Clr” input on UPC. Va: . I5 is ‘t‘t'tnie T—to—CI can e cansidctcd as a Tie—Branch or an Aetit"‘—High unconditional" ‘oraneh, you chose to treat it as an in E Ear i I so that i ' (slave? hire-T BE T E “Ct-BM“ {im' EElUEL Midterm 3—‘2 - Spring 200-? We enjoyed teaching this class and we hope you liked it. We hope to post grades by Monday May it], {14. Have a good summer break. - Gandhi. the Tits, and the graders © Copyright 2004 Gandhi Pun'ada ...
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