Dicussion Slides #4 EE457_Dis4_QuizPreparation

Dicussion Slides #4 EE457_Dis4_QuizPreparation - 5 9 7....

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1 1 EE457 Discussion Fall 2006 Quiz Preparation (Based on sample exam questions) Discussion #4 Brandon Franzke 2 1. Synchronous Counter • Label: ENABLE, LOAD, CLEAR • Mux inputs?
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2 3 2. Enable Control • Both correct? • Which one is better? (note: EN may take ½ clock until valid and stable) 4 3. Truncated Counters • Complete these base-5 counters • Which is faster?
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3 5 4. Special 3-bit Counters • Complete to skip {0,1,2} • 3, 4, 5, 6, 7, 3, 4, 5, 6, 7,… 6 5. Cascaded Counters • Build a 6-bit counter using two 3-bit counters
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4 7 5. Cascaded Counters (cont) • Alternate 6-bit counter design • Is this design superior? 8 6. Stopwatch (0:00 – 1:59)
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Unformatted text preview: 5 9 7. Clear the Rhombus Design a system (datapath + control unit) to clear the rhombus Inputs: I_limit J_width Example for i_limit = 4 and j_width = 2 10 7.1 Datapath Datapath is almost complete 6 11 7.2 State Diagram incomplete but 3 states is enough 12 8. Lab 1 (restricted MAX / MIN) A 3 7 4 C 9 5 I = 2 J = 13 MIN = 3 MAX = A 7 13 8.1 QCA Computation Which students are right? 14 8.2 State Machine Complete the transitions Finish QLD, QCA, QCB 8 15 8.3 DPU (complete) 16 8.4 Control Unit NSL Complete QCA 9 17 8.5 Control Unit OFL Complete J_SEL...
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This note was uploaded on 06/27/2008 for the course EE 457x taught by Professor Puvvada during the Fall '07 term at USC.

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Dicussion Slides #4 EE457_Dis4_QuizPreparation - 5 9 7....

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