EE457_Discussion_13_Fall2007

EE457_Discussion_13_Fall2007 - EE457 Discussion Fall 2007...

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1 1 EE457 Discussion Fall 2007 Discussion # 13 Dynamic Branch Prediction Tony Toghia, USC 2007 2 Why Predict Branches? • Following the wrong execution path results in flushed instructions, wasted cycles • 1 in 5 instructions is a branch • Superpipelined processors may have as many as 10, 20, or even 30 pipeline stages!!! • Out-of-order processors may actually speculate around branch instructions
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2 3 Goals of Branch Prediction • Predict direction (Branch History Register/Pattern History Table) – Taken (T, 1) – Not Taken (N, 0) • Predict destination (Branch Target Buffer) – PC Target Address 4 Two Types of Prediction • Local - Predict the direction of a Branch A based on the previous outcomes of Branch A • Global – Predict the direction of Branch Z based on the previous branches leading up to it (A, B, C…X, Y)
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3 5 1-Bit Pattern History (PH) • Predicted outcome = actual outcome of last branch 0 (Predict N) 1 (Predict T) Branch Taken Branch Taken Branch Not Taken Branch Not Taken 6 What’s Wrong With 1-Bit PH • Consider 10-iteration loop – e.g. for (i=0; i<10; i++) • What about the next time we run the loop? N T T T T T T T T T Actual Prediction 9 8 7 6 5 4 3 2 1 0 Iteration
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4 7 2-Bit Pattern History 00 01 11 10 Predict T/N?
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EE457_Discussion_13_Fall2007 - EE457 Discussion Fall 2007...

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